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[AMDGPU] Use subtarget call to determine number of VGPRs (#157927)
Since the register file was increased that is no longer valid to call VGPR_32RegClass.getNumregs() to get a total number of arch registers available on a subtarget. Fixes: SWDEV-550425
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3 files changed

+8
-5
lines changed

3 files changed

+8
-5
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3452,7 +3452,7 @@ bool SITargetLowering::CanLowerReturn(
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// We must use the stack if return would require unavailable registers.
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unsigned MaxNumVGPRs = Subtarget->getMaxNumVGPRs(MF);
3455-
unsigned TotalNumVGPRs = AMDGPU::VGPR_32RegClass.getNumRegs();
3455+
unsigned TotalNumVGPRs = Subtarget->getAddressableNumArchVGPRs();
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for (unsigned i = MaxNumVGPRs; i < TotalNumVGPRs; ++i)
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if (CCInfo.isAllocated(AMDGPU::VGPR_32RegClass.getRegister(i)))
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return false;

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
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// FIXME: MayNeedAGPRs is a misnomer for how this is used. MFMA selection
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// should be separated from availability of AGPRs
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if (MFMAVGPRForm ||
89-
(ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() &&
89+
(ST.getMaxNumVGPRs(F) <= ST.getAddressableNumArchVGPRs() &&
9090
!mayUseAGPRs(F)))
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MayNeedAGPRs = false; // We will select all MAI with VGPR operands.
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}

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1399,13 +1399,16 @@ unsigned getTotalNumVGPRs(const MCSubtargetInfo *STI) {
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return IsWave32 ? 1024 : 512;
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}
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1402-
unsigned getAddressableNumArchVGPRs(const MCSubtargetInfo *STI) { return 256; }
1402+
unsigned getAddressableNumArchVGPRs(const MCSubtargetInfo *STI) {
1403+
const auto &Features = STI->getFeatureBits();
1404+
if (Features.test(Feature1024AddressableVGPRs))
1405+
return Features.test(FeatureWavefrontSize32) ? 1024 : 512;
1406+
return 256;
1407+
}
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unsigned getAddressableNumVGPRs(const MCSubtargetInfo *STI,
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unsigned DynamicVGPRBlockSize) {
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const auto &Features = STI->getFeatureBits();
1407-
if (Features.test(FeatureGFX1250Insts))
1408-
return Features.test(FeatureWavefrontSize32) ? 1024 : 512;
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if (Features.test(FeatureGFX90AInsts))
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return 512;
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