-
Notifications
You must be signed in to change notification settings - Fork 11.9k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[AArch64][GISel] Drop custom selectors for ptrauth_* intrinsics #75328
[AArch64][GISel] Drop custom selectors for ptrauth_* intrinsics #75328
Conversation
@llvm/pr-subscribers-backend-aarch64 Author: Anatoly Trosinenko (atrosinenko) ChangesDrop custom selector code for ptrauth_(sign|strip|blend) intrinsics from AArch64InstructionSelector::selectIntrinsic function. The code for strip and blend intrinsics was needed because of a bug in TableGen fixed in 78623b0. The ptrauth_sign intrinsic was presumably fixed long ago. Full diff: https://github.com/llvm/llvm-project/pull/75328.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index bdaae4dd724d53..a4ace6cce46342 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -6717,68 +6717,6 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
I.eraseFromParent();
return true;
}
- case Intrinsic::ptrauth_sign: {
- Register DstReg = I.getOperand(0).getReg();
- Register ValReg = I.getOperand(2).getReg();
- uint64_t Key = I.getOperand(3).getImm();
- Register DiscReg = I.getOperand(4).getReg();
- auto DiscVal = getIConstantVRegVal(DiscReg, MRI);
- bool IsDiscZero = DiscVal && DiscVal->isZero();
-
- if (Key > AArch64PACKey::LAST)
- return false;
-
- unsigned Opcodes[][4] = {
- {AArch64::PACIA, AArch64::PACIB, AArch64::PACDA, AArch64::PACDB},
- {AArch64::PACIZA, AArch64::PACIZB, AArch64::PACDZA, AArch64::PACDZB}};
- unsigned Opcode = Opcodes[IsDiscZero][Key];
-
- auto PAC = MIB.buildInstr(Opcode, {DstReg}, {ValReg});
-
- if (!IsDiscZero) {
- PAC.addUse(DiscReg);
- RBI.constrainGenericRegister(DiscReg, AArch64::GPR64spRegClass, MRI);
- }
-
- RBI.constrainGenericRegister(DstReg, AArch64::GPR64RegClass, MRI);
- I.eraseFromParent();
- return true;
- }
- case Intrinsic::ptrauth_strip: {
- Register DstReg = I.getOperand(0).getReg();
- Register ValReg = I.getOperand(2).getReg();
- uint64_t Key = I.getOperand(3).getImm();
-
- if (Key > AArch64PACKey::LAST)
- return false;
- unsigned Opcode = getXPACOpcodeForKey((AArch64PACKey::ID)Key);
-
- MIB.buildInstr(Opcode, {DstReg}, {ValReg});
-
- RBI.constrainGenericRegister(DstReg, AArch64::GPR64RegClass, MRI);
- RBI.constrainGenericRegister(ValReg, AArch64::GPR64RegClass, MRI);
- I.eraseFromParent();
- return true;
- }
- case Intrinsic::ptrauth_blend: {
- MachineFunction &MF = *I.getParent()->getParent();
- auto RHS = getIConstantVRegVal(I.getOperand(3).getReg(), MRI);
- if (RHS && (RHS->getZExtValue() <= 0xffff)) {
- I.setDesc(TII.get(AArch64::MOVKXi));
- I.removeOperand(3);
- I.removeOperand(1);
- MachineInstrBuilder(MF, I)
- .addImm(RHS->getZExtValue() & 0xffff)
- .addImm(48)
- .constrainAllUses(TII, TRI, RBI);
- } else {
- I.setDesc(TII.get(AArch64::BFMXri));
- I.removeOperand(1);
- MachineInstrBuilder(MF, I).addImm(16).addImm(15).constrainAllUses(
- TII, TRI, RBI);
- }
- return true;
- }
case Intrinsic::frameaddress:
case Intrinsic::returnaddress: {
MachineFunction &MF = *I.getParent()->getParent();
|
Related PR: #74492 |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
LGTM, thanks!
Drop custom selector code for ptrauth_(sign|strip|blend) intrinsics from AArch64InstructionSelector::selectIntrinsic function. The code for strip and blend intrinsics was needed because of a bug in TableGen fixed in 78623b0. The ptrauth_sign intrinsic was presumably fixed long ago.
cb33c0f
to
385865d
Compare
Drop custom selector code for ptrauth_(sign|strip|blend) intrinsics from AArch64InstructionSelector::selectIntrinsic function.
The code for strip and blend intrinsics was needed because of a bug in TableGen fixed in 78623b0. The ptrauth_sign intrinsic was presumably fixed long ago.