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AMDGPU: Refactor atomicrmw fadd expansion logic (NFC) #89469

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merged 3 commits into from
Apr 22, 2024
Merged

AMDGPU: Refactor atomicrmw fadd expansion logic (NFC) #89469

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2653277
AMDGPU: Simplify DS atomicrmw fadd handling
arsenm Apr 19, 2024
02f1d1c
AMDGPU: Refactor atomicrmw fadd expansion logic
arsenm Apr 19, 2024
7982054
Merge branch 'main' into amdgpu-refactor-atomicrmw-fadd-expand
arsenm Apr 22, 2024
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54 changes: 24 additions & 30 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16075,56 +16075,50 @@ SITargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
return AtomicExpansionKind::CmpXChg;
}

if (!Ty->isFloatTy() && (!Subtarget->hasGFX90AInsts() || !Ty->isDoubleTy()))
if (!AMDGPU::isFlatGlobalAddrSpace(AS) &&
AS != AMDGPUAS::BUFFER_FAT_POINTER)
return AtomicExpansionKind::CmpXChg;

if ((AMDGPU::isFlatGlobalAddrSpace(AS) ||
AS == AMDGPUAS::BUFFER_FAT_POINTER) &&
Subtarget->hasAtomicFaddNoRtnInsts()) {
if (Subtarget->hasGFX940Insts())
return AtomicExpansionKind::None;
// TODO: gfx940 supports v2f16 and v2bf16
if (Subtarget->hasGFX940Insts() && (Ty->isFloatTy() || Ty->isDoubleTy()))
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I lost the track of this condition after many changes. Can this hasGFX940Insts() be spelled out in terms of a specific feature/target property or its combination? What about gfx11/12, we seem to expand even f32?

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@rampitec rampitec Jul 23, 2024 •
edited
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Should that be something like:

if  (Subtarget->supportsAgentScopeFineGrainedRemoteMemoryAtomics() &&
     Subtarget->hasMemoryAtomicFaddF32DenormalSupport()) {
  if (Subtarget->hasAtomicFaddRtnInsts() && Ty->isFloatTy())
    return AtomicExpansionKind::None;
  if (Subtarget->hasFlatBufferGlobalAtomicFaddF64Inst() && Ty->isDoubleTy())
    return AtomicExpansionKind::None;
}

Maybe also check addresspace global vs flat.

I believe that was the original intent of the gfx940 check, but I am not sure the meaning of unsafe is still the same.

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I have created #100217

return AtomicExpansionKind::None;

if (unsafeFPAtomicsDisabled(RMW->getFunction()))
return AtomicExpansionKind::CmpXChg;
if (unsafeFPAtomicsDisabled(RMW->getFunction()))
return AtomicExpansionKind::CmpXChg;

// Always expand system scope fp atomics.
if (HasSystemScope)
return AtomicExpansionKind::CmpXChg;
// Always expand system scope fp atomics.
if (HasSystemScope)
return AtomicExpansionKind::CmpXChg;

if ((AMDGPU::isExtendedGlobalAddrSpace(AS) ||
AS == AMDGPUAS::BUFFER_FAT_POINTER) &&
Ty->isFloatTy()) {
// global/buffer atomic fadd f32 no-rtn: gfx908, gfx90a, gfx940, gfx11+.
if (RMW->use_empty() && Subtarget->hasAtomicFaddNoRtnInsts())
return ReportUnsafeHWInst(AtomicExpansionKind::None);
// global/buffer atomic fadd f32 rtn: gfx90a, gfx940, gfx11+.
if (!RMW->use_empty() && Subtarget->hasAtomicFaddRtnInsts())
return ReportUnsafeHWInst(AtomicExpansionKind::None);
}
// global and flat atomic fadd f64: gfx90a, gfx940.
if (Subtarget->hasGFX90AInsts() && Ty->isDoubleTy())
return ReportUnsafeHWInst(AtomicExpansionKind::None);

// flat atomic fadd f32: gfx940, gfx11+.
if (AS == AMDGPUAS::FLAT_ADDRESS && Ty->isFloatTy() &&
Subtarget->hasFlatAtomicFaddF32Inst())
if (AS != AMDGPUAS::FLAT_ADDRESS && Ty->isFloatTy()) {
// global/buffer atomic fadd f32 no-rtn: gfx908, gfx90a, gfx940, gfx11+.
if (RMW->use_empty() && Subtarget->hasAtomicFaddNoRtnInsts())
return ReportUnsafeHWInst(AtomicExpansionKind::None);
// global/buffer atomic fadd f32 rtn: gfx90a, gfx940, gfx11+.
if (!RMW->use_empty() && Subtarget->hasAtomicFaddRtnInsts())
return ReportUnsafeHWInst(AtomicExpansionKind::None);
}

// global and flat atomic fadd f64: gfx90a, gfx940.
if (Ty->isDoubleTy() && Subtarget->hasGFX90AInsts())
// flat atomic fadd f32: gfx940, gfx11+.
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Comment seems to be wrong, gfx940 shall be already handled by this point (where the check for hasGFX940Insts is).

if (AS == AMDGPUAS::FLAT_ADDRESS && Ty->isFloatTy()) {
if (Subtarget->hasFlatAtomicFaddF32Inst())
return ReportUnsafeHWInst(AtomicExpansionKind::None);

// If it is in flat address space, and the type is float, we will try to
// expand it, if the target supports global and lds atomic fadd. The
// reason we need that is, in the expansion, we emit the check of address
// space. If it is in global address space, we emit the global atomic
// fadd; if it is in shared address space, we emit the LDS atomic fadd.
if (AS == AMDGPUAS::FLAT_ADDRESS && Ty->isFloatTy() &&
Subtarget->hasLDSFPAtomicAddF32()) {
if (Subtarget->hasLDSFPAtomicAddF32()) {
if (RMW->use_empty() && Subtarget->hasAtomicFaddNoRtnInsts())
return AtomicExpansionKind::Expand;
if (!RMW->use_empty() && Subtarget->hasAtomicFaddRtnInsts())
return AtomicExpansionKind::Expand;
}

return AtomicExpansionKind::CmpXChg;
}

return AtomicExpansionKind::CmpXChg;
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