Now .act file is no longer required in openfpga_flow/task when power analysis option is off

[tangxifan]

Motivate of the pull request

• To address an existing issue. If so, please provide a link to the issue: Remove the hard requirement on signal activity file in the OpenFPGA vpr_blif flow #401
• Breaking new feature. If so, please describe details in the description part.

Describe the technical details

What is currently done? (Provide issue link if applicable)

What does this pull request change?

This PR improves in the following aspects:

• Removed the requirements where .act file is already checked when even power analysis option is off in a task configuration file.
• Now variable ${TOP_MODULE} in template scripts of openfpga shell can be replaced by the top-level module name defined in task configuration file.
• Added a dedicated testcase to validate the correctness

Which part of the code base require a change

• VPR
• Tileable routing architecture generator
• OpenFPGA libraries
• FPGA-Verilog
• FPGA-Bitstream
• FPGA-SDC
• FPGA-SPICE
• Flow scripts
• Architecture library
• Cell library
• Documentation
• Regression tests
• Continous Integration (CI) scripts

Impact of the pull request

• Require a change on Quality of Results (QoR)
• Break back-compatibility. If so, please list who may be influenced.