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[wb_acq_core] Add multiple "simultaneous" acquisition paths #31
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This will be the basis for fixing the github issue #31.
This top file is the same as the afc_v3/dbe_bpm_dsp_fmc130m_4ch with the difference that we use the new wb_acq_core_2_to_1_mux for simultaneous acquisition of BPM1 and BPM2. This was suppose to fix github issue #31, but there is a problem when reading from the PCIe DDR3 memory space whle still acquiring samples. The PCIe core hangs when asked to read/write to/from DDR3 and outputs FF's forever.
Problem: We need to fix the PCIe core for this to work, as hanging the req line will cause the pcie core to generate timeouts. Possible solution 1 (software only): On receiving an arbitrary number of continous 0xFF's, detect a PCIe timeout. After this, clear the reset the timeout counter and try again. Possible solution 2 (FPGA firmware) as suggested by @abyszuk: FPGA PCIe core "client" should periodically withdraw the the access request to allow for possible pending PCIe transactions. Possible solution 3 (FPGA firmware) as suggested by @abyszuk: Give more meaning to the ui_app_gnt line: if arbiter pulls it low while ui_app_req is high, it's a signal that it wants to withdraw the access permission. In response client should deassert the ui_app_req signal as fast as possible. |
Fixed long time ago by using AXI protocol and AXI datamover+interconnect |
Issue by lerwys
Wednesday Jun 04, 2014 at 19:17 GMT
Originally opened as lerwys/bpm-sw-old-backup#31
There is a need to have multiple acquisition paths acquiring data simultaneous,
in a multiplexed way.
This is the traditional use case for our case, in that 1 AFC handles 2 BPMs signals.
So, at least we must decouple the acquisition paths from the 2 different BPMs
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