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add zotino example code #842
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artiq/gateware/spi.py
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@@ -70,9 +68,7 @@ class SPIMaster(Module): | |||
completed transfer. | |||
* If desired, change xfer register for the next transfer. | |||
* If desired, write data queuing the next (possibly chained) transfer. | |||
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Why remove those lines?
@@ -368,4 +362,4 @@ def __init__(self, t): | |||
# print(convert(dut)) | |||
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Tristate.lower = _TestTristate | |||
run_simulation(dut, _test_gen(dut.bus), vcd_name="spi_master.vcd") | |||
run_simulation(dut, _test_gen(dut.bus), vcd_name="spi_master.vcd") |
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Please look at the patch and remove things like this.
artiq/examples/master/zotino.py
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self.setattr_device("ser_config") | ||
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@kernel | ||
def dir_config(self, rclk, srclk, ser, data): |
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I would call those consistently with io_config
and with better names, e.g. clk
, ser_data
, latch
.
artiq/examples/master/zotino.py
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rclk.off() | ||
delay(dt) | ||
x = 0x80000000 | ||
for i in range(32): |
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There are other shift registers in the system, e.g. for the Novogorny PGIA and the Zotino LEDs, with other lengths. It makes sense to make this function generic to transfer any number of bits (not just 32), document it, and move it into some library (e.g. artiq.coredevice.shiftreg
).
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And this function could be turned into a device that uses and depends on the TTL devices, just like the DAC driver that depends on a SPI device for the data and a TTL device for LDAC.
artiq/examples/master/device_db.py
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"class": "TTLOut", | ||
"arguments": {"channel": 29} | ||
}, | ||
"shift_reg": { |
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those device names could be improved.
artiq/examples/master/zotino.py
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@kernel | ||
def run(self): | ||
self.core.reset() | ||
self.fmc_io_config(self, 0x00008800) ## set lvds direction on fmc |
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That's not going to work.
artiq/coredevice/shiftreg.py
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self.dt = dt | ||
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@kernel | ||
def fmc_io_config(self, data): |
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Shift register + latches are not specific to FMC nor configuring I/O.
artiq/examples/master/zotino.py
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@kernel | ||
def run(self): | ||
self.core.reset() | ||
self.shift_reg.shiftreg_config(self, 0x00008800) ## set lvds direction on fmc |
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Why have self
as parameter?
doc/manual/core_device.rst
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The DDS bus is on channel 32. | ||
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The Zotino(3U DAC rev1.0) is connected to kc705 FMC HPC ports using VHDCI board(VHDCI breakout rev1.0) to FMC card(FMC DIO ch32 lvds a v1.2). | ||
On the VHDCI board, J44A is connected to J41 since LVDS2 is now chosen to be connected to J37 on the zotino. |
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This is not clear. It sounds like both J44A and J41 are on the same board. And which "VHDCI board", the FMC/VHDCI or the VHDCI breakout?
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"Name ambiguity due to encoding metadata in the name" strikes again. Nice indication that opaque code names are the way to go and that any approach to make names "intuitive" leads to actual issues with inconsistency, misunderstanding that are way more tangible and hard to relevant than merely complaints à la "can't remember the name".
doc/manual/core_device.rst
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This configuration supports a Zotino connected to the KC705 FMC HPC through a FMC DIO 32ch LVDS v1.2 and a VHDCI breakout board rev 1.0. | ||
The KC705 FMC HPC should be connected to J44A and the Zotino should be connected to J41 of the VHDCI breadout board. |
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breakout
artiq/coredevice/shiftreg.py
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@@ -1,3 +1,16 @@ | |||
<<<<<<< HEAD |
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Please look at the patches you are proposing.
artiq/coredevice/shiftreg.py
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@@ -11,10 +24,30 @@ def __init__(self, dmgr, clk, ser, latch, n=32, dt=10*us): | |||
self.clk = dmgr.get(clk) | |||
self.ser = dmgr.get(ser) | |||
self.latch = dmgr.get(latch) | |||
>>>>>>> 8407b2c400f4c4565f2504d7bc2b6a8ee70e6918 |
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ditto
This configuration supports a Zotino connected to the KC705 FMC HPC through a FMC DIO 32ch LVDS v1.2 and a VHDCI breakout board rev 1.0. | ||
The KC705 FMC HPC should be connected to J44A and the Zotino should be connected to J41 of the VHDCI breakout board. |
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The VHDCI breakout board does not have a "J44A" marking on its silkscreen and even less on its future front panel, so referencing it does not make the reader's life easier. You should write this documentation for someone who is setting up their boards the first time, and you should have said the bottom connector.
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