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Adding nrf51 timer unit tests
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janweinstock committed May 26, 2023
1 parent 4a5b23f commit fbdfd8e
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Showing 2 changed files with 82 additions and 5 deletions.
1 change: 1 addition & 0 deletions src/vcml/models/timers/nrf51.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,7 @@ void nrf51::write_clear(u32 val) {
if (val == 1u) {
count = 0;
m_start = sc_time_stamp();
update();
}
}

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86 changes: 81 additions & 5 deletions test/models/timer_nrf51.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -39,23 +39,99 @@ class nrf51_test : public test_base
NRF51_MODE = 0x504,
NRF51_BITMODE = 0x508,
NRF51_PRESCALER = 0x510,
NRF51_CC = 0x540,
NRF51_CC0 = 0x540,
};

constexpr u64 nrf51_capture(size_t i) { return NRF51_CAPTURE0 + i * 4; }
constexpr u64 nrf51_compare(size_t i) { return NRF51_COMPARE0 + i * 4; }
constexpr u64 nrf51_cc(size_t i) { return NRF51_CC0 + i * 4; }

nrf51_test(const sc_module_name& nm):
test_base(nm), nrf51("nrf51"), out("out"), irq("irq") {
out.bind(nrf51.in);
nrf51.irq.bind(irq);
rst.bind(nrf51.rst);
clk.bind(nrf51.clk);
nrf51.clk.stub(16 * MHz);
EXPECT_STREQ(nrf51.kind(), "vcml::timers::nrf51");
}

virtual void run_test() override {
// u32 data;

u32 data;
wait(SC_ZERO_TIME);
EXPECT_FALSE(irq) << "irq did not reset";
ASSERT_FALSE(irq) << "irq did not reset";

// setup bitmode and prescaler
ASSERT_OK(out.writew<u32>(NRF51_BITMODE, 3));
ASSERT_OK(out.writew<u32>(NRF51_PRESCALER, 4)); // 16 MHz / 2^4

// start time and sample
ASSERT_OK(out.writew<u32>(NRF51_START, 1));
wait(1, SC_SEC);
ASSERT_OK(out.writew<u32>(NRF51_STOP, 1));
ASSERT_OK(out.writew<u32>(nrf51_capture(1), 1));
ASSERT_OK(out.readw<u32>(nrf51_cc(1), data));
ASSERT_EQ(data, 1000000);

// timer should not count while stopped
wait(10, SC_SEC);
ASSERT_OK(out.writew<u32>(nrf51_capture(2), 1));
ASSERT_OK(out.readw<u32>(nrf51_cc(2), data));
ASSERT_EQ(data, 1000000);

// clear timer
ASSERT_OK(out.writew<u32>(NRF51_CLEAR, 1));
ASSERT_OK(out.writew<u32>(nrf51_capture(3), 1));
ASSERT_OK(out.readw<u32>(nrf51_cc(3), data));
ASSERT_EQ(data, 0);
ASSERT_FALSE(irq);

// test interrupts
ASSERT_OK(out.writew<u32>(NRF51_INTENSET, bit(16)));
ASSERT_OK(out.writew<u32>(nrf51_cc(0), 2000000));
ASSERT_OK(out.writew<u32>(nrf51_compare(0), 0));
ASSERT_OK(out.writew<u32>(NRF51_START, 1));
ASSERT_FALSE(irq);
sc_time t = sc_time_stamp();
wait(irq.default_event());
ASSERT_TRUE(irq);
t = sc_time_stamp() - t;
ASSERT_EQ(t, sc_time(2.0, SC_SEC));
ASSERT_OK(out.readw<u32>(nrf51_compare(0), data));
ASSERT_EQ(data, 1);
ASSERT_OK(out.writew<u32>(nrf51_cc(0), 0));
ASSERT_OK(out.writew<u32>(nrf51_compare(0), 0));
ASSERT_FALSE(irq);
ASSERT_OK(out.writew<u32>(NRF51_START, 0));

// test counter mode
ASSERT_OK(out.writew<u32>(NRF51_MODE, 1));
ASSERT_OK(out.writew<u32>(NRF51_CLEAR, 1));
ASSERT_OK(out.writew<u32>(NRF51_START, 1));
for (size_t i = 0; i < 3; i++)
ASSERT_OK(out.writew<u32>(NRF51_COUNT, 1));
ASSERT_OK(out.writew<u32>(nrf51_capture(2), 1));
ASSERT_OK(out.readw<u32>(nrf51_cc(2), data));
ASSERT_EQ(data, 3);
ASSERT_OK(out.writew<u32>(nrf51_cc(0), 5));
ASSERT_OK(out.writew<u32>(nrf51_compare(0), 0));
ASSERT_FALSE(irq);
ASSERT_OK(out.writew<u32>(NRF51_COUNT, 1));
ASSERT_FALSE(irq);
ASSERT_OK(out.writew<u32>(NRF51_COUNT, 1));
ASSERT_TRUE(irq);
ASSERT_OK(out.writew<u32>(nrf51_cc(0), 0));
ASSERT_OK(out.writew<u32>(nrf51_compare(0), 0));
ASSERT_FALSE(irq);

// test counter mode stop
ASSERT_OK(out.writew<u32>(nrf51_capture(3), 1));
ASSERT_OK(out.readw<u32>(nrf51_cc(3), data));
ASSERT_EQ(data, 5);
ASSERT_OK(out.writew<u32>(NRF51_STOP, 1));
ASSERT_OK(out.writew<u32>(NRF51_COUNT, 1));
ASSERT_OK(out.writew<u32>(nrf51_capture(1), 1));
ASSERT_OK(out.readw<u32>(nrf51_cc(1), data));
ASSERT_EQ(data, 5);
}
};

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