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Refactor Examples #45

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@PhilippvK PhilippvK commented Oct 8, 2024

Needs rebase after #44 is merged.

Changes:

  • Add more example instructions (loads for RV32/RV64, XCV, ADDW,...)
  • Run examples for --riscv-xlen 32 and --riscv-xlen 64
  • Run examples with/without --no-extend
  • Use llvm-lit infrastructure for automated checks
  • Parser: allow use of XLEN in casts and definitions
  • Unify CoreDSL formatting

@PhilippvK PhilippvK self-assigned this Oct 8, 2024
@PhilippvK PhilippvK force-pushed the philippvk5_llvm19.1.0_rebased_examples branch from bc996cd to 40b3090 Compare October 8, 2024 12:31
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@mathis-s I have the feeling that the support for immediates broke in an earlier commit ...

pattern-gen: /work/git/students/mathis/CoreDSL2LLVM/llvm/include/llvm/CodeGen/Register.h:111: llvm::MCRegister llvm::Register::asMCReg() const: Assertion `Reg == MCRegister::NoRegister || MCRegister::isPhysicalRegister(Reg)' failed.

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mathis-s commented Oct 9, 2024

@mathis-s I have the feeling that the support for immediates broke in an earlier commit ...

pattern-gen: /work/git/students/mathis/CoreDSL2LLVM/llvm/include/llvm/CodeGen/Register.h:111: llvm::MCRegister llvm::Register::asMCReg() const: Assertion `Reg == MCRegister::NoRegister || MCRegister::isPhysicalRegister(Reg)' failed.

Will take a look!

@PhilippvK PhilippvK force-pushed the philippvk5_llvm19.1.0_rebased_examples branch from 2f6d03e to a866104 Compare October 9, 2024 09:32
@PhilippvK PhilippvK marked this pull request as ready for review October 9, 2024 09:32
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@mathis-s I have the feeling that the support for immediates broke in an earlier commit ...

pattern-gen: /work/git/students/mathis/CoreDSL2LLVM/llvm/include/llvm/CodeGen/Register.h:111: llvm::MCRegister llvm::Register::asMCReg() const: Assertion `Reg == MCRegister::NoRegister || MCRegister::isPhysicalRegister(Reg)' failed.

Will take a look!

Thanks. Here is the recent ci job: https://github.com/mathis-s/CoreDSL2LLVM/actions/runs/11251833148/job/31283706173?pr=45

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mathis-s commented Oct 9, 2024

Should be fixed. Problem was that LLVM had a useless COPY in the MIR. I added some code to peek through that copy.

The CV_ADDN instruction is a really tough in general though because we need an intermediate result larger than XLEN. Pretty nice that it manages to generate a pattern, though I'm not sure it would match.

@PhilippvK PhilippvK force-pushed the philippvk5_llvm19.1.0_rebased_examples branch from a866104 to 75c741e Compare October 11, 2024 06:49
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Should be fixed. Problem was that LLVM had a useless COPY in the MIR. I added some code to peek through that copy.

Thanks, I just pushed a rebase.

The CV_ADDN instruction is a really tough in general though because we need an intermediate result larger than XLEN. Pretty nice that it manages to generate a pattern, though I'm not sure it would match.

That was the reason why I added the test and run lit with and without the --no-extend flag.

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