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This library is meant to provide you with the tools and algorithms needed for retiming synchronous circuits, each algorithm implemented in this library has been taken from Retiming Synchronous Circuitry by Charles E. Leiserson and James B. Saxe

Retiming

This algorithm implements a circuit transformation called retiming in which registers are added at some points in a circuit and removed from others in such away that the functional behaviour of the circuit as a whole is preserved. Retiming can be used to transform a given synchronous circuit into a more efficient circuit under a variety of different cost criteria. We model a circuit as a graph in which the vertex set V is a collection of combinational logic elements and the edge set E is the set of interconnections, each of which may pass through zero or more registers.

The problem of determining an equivalent retimed circuit with minimum state (total number of registers) is polynomial-time solvable.

Tools used

This library makes heavy usage of these libraries listed below

• NetworkX
• NumPy
• PyTest