Researcher in the areas of system-level design, verification, security validation, machine learning techniques, and approximate computing.
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University of Bremen/DFKI
- Bremen, Germany
- https://mehrangoli.github.io/
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Static-Data-Extractor
Static-Data-Extractor PublicExtracting static information from a given SystemC design
C++ 3
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Verilog-Benchmarks
Verilog-Benchmarks PublicThis repository includes set of Verilog benchmarks
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Control-Flow-Extractor
Control-Flow-Extractor PublicExtracting control flow of the binary executable model of SystemC designs.
C++ 2
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