Build and test for RISC-V

[rinon]

• Add RISC-V asm (Backport updates from dav1d 1.4.0 #812)
• Fix build on RISC-V (Fix features and build.rs to compile with default features even on platforms with no asm support #775)

[thedataking]

• Looks like the main assembly routines for RISC-V target the itx module. I can easily add those in once PR src/itx.rs: Deduplicate w/ generics #683 lands. Landed.
• Also need to update cpumask in dav1d_cli_parse.rs.

[thedataking]

Currently, enabling vector support crashes qemu-riscv64-system, need to fix that. In order to enable the v target feature, QEMU needs to be invoked like this:

qemu-riscv64-static -cpu rv64,v=true,vext_spec=v1.0,vlen=256,elen=64 path/to/dav1d

Issue observed on QEMU 8.0.4. Might be worth trying on a newer release.

Notes on how to debug crashes in QEMU: #227 (comment)