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Build and test for RISC-V #870
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Everything LGTM now except for in fn compile_time_detect
, the cfg
needs to be #[cfg(target_feature = "v")]
because that fn
is specifically for compile-time detection of features. As you can see, we similarly do #[cfg(target_feature = "neon")]
for CpuFlags::NEON
.
For now the only CPU flag we check for is RISC-V Vector extension (RVV).
This updates the cpumask and help text in dav1d_cli_parse.rs but does not add support for the underlying riscv assembly routines.
Removes warnings while the RISC-V code paths do not support asm. Once assembly routines are added, we will want to gradually add the items configured out in this commit back in.
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build.rs
to compile with default features even on platforms with no asm support #775.Build for QEMU user with:
(Note to self: remove
,+v
in above command to test RISC-V sans assembly.)Note: the above command seems to work on Ubuntu 22.04 which comes with ld version 2.38 but fail on Ubuntu 20.04 where ld is version 2.34.