GitHub - mhjasonliu/361Lab: EECS 361 Lab Repo

Name		Name	Last commit message	Last commit date
Latest commit History 61 Commits
ALU		ALU
ALU_Control		ALU_Control
MainControl		MainControl
CtrlUnitsPackage.vhd		CtrlUnitsPackage.vhd
EXunit.vhd		EXunit.vhd
Funit.vhd		Funit.vhd
Funit_addIsZero.vhd		Funit_addIsZero.vhd
Funit_ander.vhd		Funit_ander.vhd
Funit_ander_test.vhd		Funit_ander_test.vhd
Funit_half.vhd		Funit_half.vhd
Funit_half_test.vhd		Funit_half_test.vhd
Funit_test.vhd		Funit_test.vhd
Funit_test2.vhd		Funit_test2.vhd
HazardUnit.vhd		HazardUnit.vhd
IDecodeUnit.vhd		IDecodeUnit.vhd
IDecodeUnitTest.vhd		IDecodeUnitTest.vhd
IFetchUnit.vhd		IFetchUnit.vhd
InstructionFetchUnit.vhd		InstructionFetchUnit.vhd
InstructionFetchUnitPackage.vhd		InstructionFetchUnitPackage.vhd
InstructionFetchUnitTest.vhd		InstructionFetchUnitTest.vhd
MemUnit.vhd		MemUnit.vhd
README.md		README.md
WBUnit.vhd		WBUnit.vhd
add_32.vhd		add_32.vhd
alvinPackage.vhd		alvinPackage.vhd
dffr_a.vhd		dffr_a.vhd
extender_signed.vhd		extender_signed.vhd
fatBoi.vhd		fatBoi.vhd
fatPipeline.vhd		fatPipeline.vhd
fatPipeline_test.vhd		fatPipeline_test.vhd
regCompare.vhd		regCompare.vhd
reg_30.vhd		reg_30.vhd
reg_32.vhd		reg_32.vhd
reg_32_ar.vhd		reg_32_ar.vhd
reg_32to1mux.vhd		reg_32to1mux.vhd
reg_addToBinary.vhd		reg_addToBinary.vhd
reg_andStack.vhd		reg_andStack.vhd
reg_comp.vhd		reg_comp.vhd
reg_comp_test.vhd		reg_comp_test.vhd
reg_comp_test2.vhd		reg_comp_test2.vhd
reg_muxTest.vhd		reg_muxTest.vhd
reg_mux_test.vhd		reg_mux_test.vhd
reg_n_ar.vhd		reg_n_ar.vhd
reg_n_sync.vhd		reg_n_sync.vhd
sc_proc.vhd		sc_proc.vhd
sc_proc_test.vhd		sc_proc_test.vhd

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