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verify_l3_cache add exception for Standard_NC8as_T4_v3 and Standard_NC16as_T4_v3 #2939

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merged 1 commit into from
Sep 6, 2023

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@adityagesh adityagesh commented Sep 5, 2023

Standard_NC8as_T4_v3 and Standard_NC16as_T4_v3 should ideally have 4 CPUs mapped to an L3 cache, but currently all CPUs are mapped to a single L3 cache. This is a temporary exception. This commit needs to be reverted in future.

@adityagesh adityagesh force-pushed the aditya/fix_l3_cache branch 2 times, most recently from a0faaea to 2915894 Compare September 5, 2023 11:12
LiliDeng
LiliDeng previously approved these changes Sep 5, 2023
Standard_NC8as_T4_v3 and Standard_NC16as_T4_v3 should ideally have
4 CPUs mapped to an L3 cache,
but currently all CPUs are mapped to a single L3 cache. This is a
temporary exception. This commit  needs to be reverted in future.
@adityagesh adityagesh changed the title verify_l3_cache add exception for Standard_NC16as_T4_v3 verify_l3_cache add exception for Standard_NC8as_T4_v3 and Standard_NC16as_T4_v3 Sep 6, 2023
@adityagesh adityagesh merged commit d0b7fd1 into main Sep 6, 2023
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@adityagesh adityagesh deleted the aditya/fix_l3_cache branch September 6, 2023 10:06
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2 participants