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Currently div2n1n (i.e. div 128 -> 64 and div 64 -> 32) are implemented using assembly instructions.
Division in hardware is often implemented via microcode with timing that often depends on the operand values.
We need a guaranteed constant-time version of dividing 2 words by a word.
The text was updated successfully, but these errors were encountered:
Implement fully constant-time division closes #2 closes #9
0298472
Constant time (#185)
26954f9
* Implement fully constant-time division closes #2 closes #9 * constant-time hex parsing * prevent cache timing attacks in toHex() conversion (which is only for test/debug purposes anyway)
Successfully merging a pull request may close this issue.
Currently div2n1n (i.e. div 128 -> 64 and div 64 -> 32)
are implemented using assembly instructions.
Division in hardware is often implemented via microcode with timing that often depends on the operand values.
We need a guaranteed constant-time version of dividing 2 words by a word.
The text was updated successfully, but these errors were encountered: