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Missing feature: GCC (and CLANG and other compmilers) have a feature called: "--include" - this tells the compiler to forcably include the specified file before anything else.
For example: "gcc --include foobar.h -Isome/directory xyzzy.c"
GCC will first read and compile "foobar.h" - then read the file "xyzzy.c" - and compile the result.
It would be helpful if this was added as a feature.
NICE TO HAVE: Some other tools (static analisys) tools - sort of wrap GCC in a Makefile like this:
# The normal case is this:
sometarget:
gcc -o foo.o -c foo.c
THE WRAP occurs like this:
sometarget:
$(WRAP_GCC) gcc -o foo.o -c foo.c
The idea is that you define WRAP_GCC to some command
This command would then parse the arguments passed to GCC, extracting what it needs
Then executes GCC in the standard way.
In other words, it would capture any and all command line -DFOO=42 type things, and all -Idirectory/paths in the proper order.
In somecases,
In some cases, the tool will capture the GCC executable name - (which may not be in your path and might be an absolute path - (this happens with cross compile tools often). - Then it will re-exec GCC with different options to capture the Compiler BUILT IN defines, see: https://stackoverflow.com/questions/2224334/gcc-dump-preprocessor-defines - for an example of how to do that.
The advantage of this is you can also capture the various built in compiler DEFINES such as ENDIANNESS that might change the #if/#else/#endif sequence found in a file
Another tool - (coverity) - does a more brute force method - it captures the EXEC call and parses the command line, but I have also see others that just "re-exec" - the compiler under the hood.
I think that this type of "MAKE_MACRO" - wrapper would be a great addition to CPPCLEAN.
This would make it very easy to get more complete information from the Cpre-processor:
The result would be something like this in a makefile:
Missing feature: GCC (and CLANG and other compmilers) have a feature called: "--include" - this tells the compiler to forcably include the specified file before anything else.
For example: "gcc --include foobar.h -Isome/directory xyzzy.c"
GCC will first read and compile "foobar.h" - then read the file "xyzzy.c" - and compile the result.
It would be helpful if this was added as a feature.
NICE TO HAVE: Some other tools (static analisys) tools - sort of wrap GCC in a Makefile like this:
The idea is that you define WRAP_GCC to some command
This command would then parse the arguments passed to GCC, extracting what it needs
Then executes GCC in the standard way.
In other words, it would capture any and all command line -DFOO=42 type things, and all -Idirectory/paths in the proper order.
In somecases,
In some cases, the tool will capture the GCC executable name - (which may not be in your path and might be an absolute path - (this happens with cross compile tools often). - Then it will re-exec GCC with different options to capture the Compiler BUILT IN defines, see: https://stackoverflow.com/questions/2224334/gcc-dump-preprocessor-defines - for an example of how to do that.
The advantage of this is you can also capture the various built in compiler DEFINES such as ENDIANNESS that might change the #if/#else/#endif sequence found in a file
Another tool - (coverity) - does a more brute force method - it captures the EXEC call and parses the command line, but I have also see others that just "re-exec" - the compiler under the hood.
I think that this type of "MAKE_MACRO" - wrapper would be a great addition to CPPCLEAN.
This would make it very easy to get more complete information from the Cpre-processor:
The result would be something like this in a makefile:
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