mBldcm (Brushless DC Motor Driver IP)

Overview

This is hardware IP of Brushless DC Motor Driver.

Interfaces

• Avalon Memory Mapped (Avalon-MM) I/F
  • I/F between this IP and other controllers, e.g. Micro Controller.
  • To control the motor driver.
  • To get status of the motor driver.
  • Please read RegisterMap_mBldcm for more detail.
• 6 signals to drive gate to drive BLDCM
  • U-phase signal (High-side/Low-side)
  • V-phase signal (High-side/Low-side)
  • W-phase signal (High-side/Low-side)

Integration

You can use Intel Platform Designer (Old name: Qsys) to integrate this IP into your system.

Requirement

• LPM_DIVIDE IP Core (Intel FPGA Integer Arithmetic IP Cores Series)

License

Please see LICENSE.md file for details.