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| 1 | +/* |
| 2 | + * NI 16550 Transceiver Driver |
| 3 | + * |
| 4 | + * The National Instruments (NI) 16550 has built-in RS-485 transceiver control |
| 5 | + * circuitry. This driver provides the transceiver control functionality |
| 6 | + * for the RS-485 ports and uses the 8250 driver for the UART functionality. |
| 7 | + * |
| 8 | + * Copyright 2012 National Instruments Corporation |
| 9 | + * |
| 10 | + * This program is free software; you can redistribute it and/or modify it |
| 11 | + * under the terms of the GNU General Public License as published by the Free |
| 12 | + * Software Foundation; either version 2 of the License, or (at your option) |
| 13 | + * any later version. |
| 14 | + * |
| 15 | + * This program is distributed in the hope that it will be useful, but WITHOUT |
| 16 | + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 17 | + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 18 | + * more details. |
| 19 | + * |
| 20 | + * You should have received a copy of the GNU General Public License along |
| 21 | + * with this program; if not, write to the Free Software Foundation, Inc., 51 |
| 22 | + * Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 23 | + */ |
| 24 | + |
| 25 | +#include "8250.h" |
| 26 | +#include <linux/init.h> |
| 27 | +#include <linux/uaccess.h> |
| 28 | +#include <linux/device.h> |
| 29 | + |
| 30 | +#define NI16550_PCR_OFFSET 0x0F |
| 31 | +#define NI16550_PCR_RS422 0x00 |
| 32 | +#define NI16550_PCR_ECHO_RS485 0x01 |
| 33 | +#define NI16550_PCR_DTR_RS485 0x02 |
| 34 | +#define NI16550_PCR_AUTO_RS485 0x03 |
| 35 | +#define NI16550_PCR_WIRE_MODE_MASK 0x03 |
| 36 | +#define NI16550_PCR_TXVR_ENABLE_BIT (1 << 3) |
| 37 | +#define NI16550_PCR_RS485_TERMINATION_BIT (1 << 6) |
| 38 | + |
| 39 | +static int ni16550_enable_transceivers(struct uart_port *port) |
| 40 | +{ |
| 41 | + uint8_t pcr; |
| 42 | + dev_dbg(port->dev, ">ni16550_enable_transceivers\n"); |
| 43 | + |
| 44 | + pcr = port->serial_in(port, NI16550_PCR_OFFSET); |
| 45 | + pcr |= NI16550_PCR_TXVR_ENABLE_BIT; |
| 46 | + dev_dbg(port->dev, "write pcr: 0x%08x\n", pcr); |
| 47 | + port->serial_out(port, NI16550_PCR_OFFSET, pcr); |
| 48 | + |
| 49 | + dev_dbg(port->dev, "<ni16550_enable_transceivers\n"); |
| 50 | + |
| 51 | + return 0; |
| 52 | +} |
| 53 | + |
| 54 | +static int ni16550_disable_transceivers(struct uart_port *port) |
| 55 | +{ |
| 56 | + uint8_t pcr; |
| 57 | + dev_dbg(port->dev, ">ni16550_disable_transceivers\n"); |
| 58 | + |
| 59 | + pcr = port->serial_in(port, NI16550_PCR_OFFSET); |
| 60 | + pcr &= ~NI16550_PCR_TXVR_ENABLE_BIT; |
| 61 | + dev_dbg(port->dev, "write pcr: 0x%08x\n", pcr); |
| 62 | + port->serial_out(port, NI16550_PCR_OFFSET, pcr); |
| 63 | + |
| 64 | + dev_dbg(port->dev, "<ni16550_disable_transceivers\n"); |
| 65 | + |
| 66 | + return 0; |
| 67 | +} |
| 68 | + |
| 69 | +static int ni16550_config_rs485(struct uart_port *port, |
| 70 | + struct serial_rs485 *rs485) |
| 71 | +{ |
| 72 | + uint8_t pcr; |
| 73 | + dev_dbg(port->dev, ">ni16550_config_rs485\n"); |
| 74 | + |
| 75 | + /* "rs485" should be given to us non-NULL. */ |
| 76 | + BUG_ON(rs485 == NULL); |
| 77 | + |
| 78 | + pcr = port->serial_in(port, NI16550_PCR_OFFSET); |
| 79 | + pcr &= ~NI16550_PCR_WIRE_MODE_MASK; |
| 80 | + |
| 81 | + if (rs485->flags & SER_RS485_ENABLED) { |
| 82 | + /* RS-485 */ |
| 83 | + if ((rs485->flags & SER_RS485_RX_DURING_TX) && |
| 84 | + (rs485->flags & SER_RS485_RTS_ON_SEND)) { |
| 85 | + dev_dbg(port->dev, "Invalid 2-wire mode\n"); |
| 86 | + return -EINVAL; |
| 87 | + } |
| 88 | + |
| 89 | + if (rs485->flags & SER_RS485_RX_DURING_TX) { |
| 90 | + /* Echo */ |
| 91 | + dev_vdbg(port->dev, "2-wire DTR with echo\n"); |
| 92 | + pcr |= NI16550_PCR_ECHO_RS485; |
| 93 | + } else { |
| 94 | + /* Auto or DTR */ |
| 95 | + if (rs485->flags & SER_RS485_RTS_ON_SEND) { |
| 96 | + /* Auto */ |
| 97 | + dev_vdbg(port->dev, "2-wire Auto\n"); |
| 98 | + pcr |= NI16550_PCR_AUTO_RS485; |
| 99 | + } else { |
| 100 | + /* DTR-controlled */ |
| 101 | + /* No Echo */ |
| 102 | + dev_vdbg(port->dev, "2-wire DTR no echo\n"); |
| 103 | + pcr |= NI16550_PCR_DTR_RS485; |
| 104 | + } |
| 105 | + } |
| 106 | + } else { |
| 107 | + /* RS-422 */ |
| 108 | + dev_vdbg(port->dev, "4-wire\n"); |
| 109 | + pcr |= NI16550_PCR_RS422; |
| 110 | + } |
| 111 | + |
| 112 | + dev_dbg(port->dev, "write pcr: 0x%08x\n", pcr); |
| 113 | + port->serial_out(port, NI16550_PCR_OFFSET, pcr); |
| 114 | + |
| 115 | + /* Update the cache. */ |
| 116 | + port->rs485 = *rs485; |
| 117 | + |
| 118 | + dev_dbg(port->dev, "<ni16550_config_rs485\n"); |
| 119 | + return 0; |
| 120 | +} |
| 121 | + |
| 122 | +static void |
| 123 | +ni16550_set_rs485_defaults(struct serial_rs485 *rs485) |
| 124 | +{ |
| 125 | + rs485->flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND; |
| 126 | +} |
| 127 | + |
| 128 | +static struct txvr_ops ni16550_txvr_ops = { |
| 129 | + .enable_transceivers = ni16550_enable_transceivers, |
| 130 | + .disable_transceivers = ni16550_disable_transceivers, |
| 131 | + .config_rs485 = ni16550_config_rs485, |
| 132 | +}; |
| 133 | + |
| 134 | +int ni16550_register_port(struct uart_8250_port *uart) |
| 135 | +{ |
| 136 | + int line; |
| 137 | + |
| 138 | + dev_dbg(uart->port.dev, ">ni16550_register_port\n"); |
| 139 | + |
| 140 | + uart->port.txvr_ops = &ni16550_txvr_ops; |
| 141 | + ni16550_set_rs485_defaults(&(uart->port.rs485)); |
| 142 | + |
| 143 | + line = serial8250_register_8250_port(uart); |
| 144 | + dev_vdbg(uart->port.dev, "line: 0x%08x\n", line); |
| 145 | + if (line < 0) { |
| 146 | + dev_dbg(uart->port.dev, "line is less than zero\n"); |
| 147 | + dev_dbg(uart->port.dev, "<ni16550_register_port\n"); |
| 148 | + return -ENODEV; |
| 149 | + } |
| 150 | + |
| 151 | + dev_dbg(uart->port.dev, "<ni16550_register_port\n"); |
| 152 | + |
| 153 | + return line; |
| 154 | +} |
| 155 | + |
| 156 | +void ni16550_unregister_port(int line) |
| 157 | +{ |
| 158 | + serial8250_unregister_port(line); |
| 159 | +} |
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