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  1. Design363 Design363 Public

    FIFO and DMA combination study - "CY8C5888AXI-LP096" on "FreeSoC2"

    Verilog

  2. Design364 Design364 Public

    Watchdog interrupt and reset example - "CY8C4246PVI-DS402" on "CY8CKIT-146"

    C

  3. Design339 Design339 Public

    Multi-Processing using PSoC6 for advent articles - "CY8C6347BZI-BLD53" on "CY8CKIT-062-BLE"

    C