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Support GAL18V10 #36
Support GAL18V10 #36
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Nice one. I can see the DIN and SCLK pins are a bit awkward because they need to be toggled via the shift register, but you managed to find a way. Well done. I've routed the new track on the PCB design file (not uploaded yet) and modified the schematic as you indicated on your image (again not uploaded). I've ordered few GAL16V10's and would like to try them first before I merge this MR. Could you please fix the merge conflict, it looks like I merged your previous MR and that probably caused it. Thank you. |
Wiring looks correct. Although there's a typo: GAL is supposed to be 18V10 not 16V10. Also, you might want to add the pinouts of the other chips like 6001/6002 and 26CV12 with the GALmate adapter. Furthermore 20XV10/20RA10 can be in the column header with 22V10 since they have the same pinout. |
Just an update from me. I've got my GAL18V10B-15LP, but they do not work for me so far. The GALS are branded as Lattice, but I suspect they might be fake. I've made the hardware mod, merged your branch (to my local test branch) and checked the pins are toggling as expected - they do, but still PES reads 0xFF for all the bytes. I've ordered a different batch of GAL18V10B, hopefully they'll work better. |
Actually, I realised that the GALs may have been completely erased (including the PES data). Could you please send me your GAL18V10 PES bytes and I'll try to write it to the IC. That might make them work. Thanks. |
Might want to try reading the fuses out with -nc to see if there's a fusemap burned inside. |
PES raw bytes: |
Can confirm reading works. Currently don't have a test image to burn it into the 18V10. Maybe those 18V10s you got already have a fusemap in it to test. |
I just noticed that the identification byte in PES is 0x50, but documentation online states that the 18V10B is 0x51. Do you want to compare pictures of the markings on the chips? |
To test writing and functionality, you can try this jed file:
The equations are as follows:
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The write PES functionality might not be complete since 18V10 might need a sendAddress after sending the PES It might be a 16V8 relabelled though, so maybe reading it as a 16V8 gives something |
Relabelled 16V8 - I thought that as well, tried to read as 16V8, but that did not work either. |
Thanks for the image. My new order of GAL18V10 is 20LP - same as yours, so hopefully they will work. I've tested GAL6001 and GAL6002. I found 3 issues on GAL6001, I'm wondering whether you've noticed them as well:
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BTW. I could not find any software that can make JED files for GAL6001 or GAL6002. The ispLever software from Lattice no longer supports free licence, so I coud not use it. It's a shame as these these GALS are still available and seem to be quite advanced compared to GAL22V10. I wonder whether the GAL could be supported by GALasm. |
That is odd, the erase command didn't erase the PES for GAL6001, it's just that my 6002 has the PES wiped for some mysterious reason: it read fine at first and I didn't send in any erase command and the CFG bits are not wiped. I did not observe behaviour 2 and 3 on my afterburner, except when the chip is faulty and has the EDIT pin on 12V shorted to ground. Let me do a few more tests to try to reproduce your observations. |
Also, mind posting the PES of the GAL6001 and GAL6002 before it was erased? Here's mine: |
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GAL6001B 30LP GAL6002B 15LP Thanks for testing that. |
Based on documentation online it seems like 0x40 is a 6001 without the B? |
Or maybe it would be better to add support for the reimplementation of GALasm: https://github.com/simon-frankau/galette You can try GALasm that runs in your web browser here: https://rhgndf.github.io/galasm-web/ |
Possibly, one of the 6001 IC was programmed when I got it. The PES was probably overwritten by the contents as specified in the JED file - which could be designed for 6001 (non B). Anyway, the programming seems to work reliably with the non-reduced VPP so I'll use that and consider it as a pass. Thanks for the info. |
Ah - yes, I tried your Web bases Galasm and it is good. I'll check galette... |
In general, if they are pulls it's unlikely for them to be the same date code. There's a date code on the underside of the chip, could be useful to check that and see if it matches. If not it could be a 6001 relabelled to 6001B. |
There is no date code on my GAL6001B ICs, but there is a barely seen smudge indicating the date code was probably cleaned. Yes, they are pulls, some of the pins are tinned a bit. These were bought on Aliexpress. OTOH my GAL6002B do have date code underside (was not aware of it) - also bought on Aliexpress. |
Tested writing and reading from 18V10 using your example jed file. Looks like working. |
Just received my new GAL18V10-20LP and they work OK (tested erase, read and write ) on my modded Afterburner board. I'm merging your request. Thanks. |
Initial GAL18V10 support. Reading PES works, but writing is not tested.
Need a wire on the new afterburner for this to work. RA2 is not wired up in the design so a wire is needed to connect it to the shift register. Connect Pin 5 of the shift register (QF) to ZIF20.