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alvintpwangRAJA DAS
alvintpwang
authored and
RAJA DAS
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Move MCBIST lib to generic folder
Change-Id: I00f1e5043fa72227600585c5acee9ab17b6a8857 Original-Change-Id: Ib717742707bea6a626131578f5a3b1aeebc76281 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69677 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80998 Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: RAJA DAS <rajadas2@in.ibm.com>
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‎src/import/generic/memory/lib/utils/shared/mss_generic_consts.H

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@@ -58,6 +58,26 @@ enum common_consts
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ATTR_RANK3 = 3, ///< Attribute index for rank3
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};
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///
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/// @brief Common mcbist constants
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///
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enum mcbist_common_consts
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{
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CYCLES_PER_CMD = 4, ///< Best case cycles per MCBIST command
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MAX_RANK_PER_DIMM = 4,
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BYTES_PER_GB = 1000000000, ///< Multiplier to go from GB to B
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T_PER_MT = 1000000, ///< Multiplier to go from MT/s to T/s
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// Number of double words in...
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NUM_DW_IN_128B = 16,
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NUM_DW_IN_64B = 8,
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BG_SCRUB_IN_HOURS = 12,
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CMD_TIMEBASE = 8192, ///< Represents the timebase multiplier for the MCBIST inter cmd gap
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MAX_CMD_GAP = 4095, ///< Represents the maximum (non-multplied) time for MCBIST inter cmd gap
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};
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///
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/// @brief Common timings
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///
@@ -243,6 +263,169 @@ enum states
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NO_CHIP_SELECT_ACTIVE = 0xFF,
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};
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namespace mcbist
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{
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enum broadcast_timebase
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{
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// Number of 1024 2:1 cycle timebases to wait starting MCBIST
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// for SRQs to get synced for broadcast mode
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TB_COUNT_2 = 0b0000001,
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TB_COUNT_4 = 0b0000011,
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TB_COUNT_8 = 0b0000111,
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TB_COUNT_16 = 0b0001111,
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TB_COUNT_32 = 0b0011111,
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TB_COUNT_64 = 0b0111111,
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TB_COUNT_128 = 0b1111111,
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};
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enum rmw_address
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{
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// 32B block addresses into the maint portion of the rmw buffer
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DW0 = 0b111110000,
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DW1 = 0b111110001,
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DW2 = 0b111110010,
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DW3 = 0b111110011,
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DW4 = 0b111110100,
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DW5 = 0b111110101,
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DW6 = 0b111110110,
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DW7 = 0b111110111,
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DW8 = 0b111111000,
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DW9 = 0b111111001,
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DWA = 0b111111010,
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DWB = 0b111111011,
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DWC = 0b111111100,
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DWD = 0b111111101,
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DWE = 0b111111110,
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DWF = 0b111111111,
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};
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enum data_rotate_mode
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{
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// MCBIST data rotate modes refer to register MCBDRCR bits 0:3
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ROTATE_0_BITS = 0b0000,
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ROTATE_1_BITS = 0b0001,
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ROTATE_2_BITS = 0b0010,
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ROTATE_3_BITS = 0b0011,
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ROTATE_4_BITS = 0b0100,
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ROTATE_5_BITS = 0b0101,
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ROTATE_6_BITS = 0b0110,
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ROTATE_7_BITS = 0b0111,
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ROTATE_8_BITS = 0b1000,
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ROTATE_9_BITS = 0b1001,
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ROTATE_10_BITS = 0b1010,
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ROTATE_11_BITS = 0b1011,
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ROTATE_12_BITS = 0b1100,
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ROTATE_13_BITS = 0b1101,
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ROTATE_14_BITS = 0b1110,
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ROTATE_15_BITS = 0b1111,
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};
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enum data_seed_mode
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{
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// MCBIST data seed modes refer to register MCBDRCR bits 21:22
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ALL_UNIQUE = 0b00,
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REPEAT_SEED_0 = 0b01,
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REPEAT_SEED_1 = 0b10,
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REPEAT_SEED_2 = 0b11,
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};
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enum data_mode
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{
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// MCBIST test data modes
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FIXED_DATA_MODE = 0b000,
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RAND_FWD_MODE = 0b001,
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RAND_REV_MODE = 0b010,
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RAND_FWD_MAINT = 0b011,
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RAND_REV_MAINT = 0b100,
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DATA_EQ_ADDR = 0b101,
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ROTATE_LEFT_MODE = 0b110,
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ROTATE_RIGHT_MODE = 0b111,
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};
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// 0:3 Operation Type
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enum op_type
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{
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WRITE = 0b0000, // fast, with no concurrent traffic
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READ = 0b0001, // fast, with no concurrent traffic
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READ_WRITE = 0b0010,
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WRITE_READ = 0b0011,
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READ_WRITE_READ = 0b0100,
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READ_WRITE_WRITE = 0b0101,
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RAND_SEQ = 0b0110,
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READ_READ_WRITE = 0b1000,
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SCRUB_RRWR = 0b1001,
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STEER_RW = 0b1010,
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ALTER = 0b1011, // (W)
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DISPLAY = 0b1100, // (R, slow)
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CCS_EXECUTE = 0b1111,
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// if bits 9:11 (Data Mode bits) = 000 (bits 4:8 used to specify which subtest to go to)
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// Refresh only cmd if bits 9:11 (Data Mode bits) /= 000
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GOTO_SUBTEST_N = 0b0111,
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};
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enum test_type
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{
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USER_MODE = 0,
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CENSHMOO = 1,
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SUREFAIL = 2,
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MEMWRITE = 3,
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MEMREAD = 4,
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CBR_REFRESH = 5,
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MCBIST_SHORT = 6,
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SHORT_SEQ = 7,
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DELTA_I = 8,
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DELTA_I_LOOP = 9,
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SHORT_RAND = 10,
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LONG1 = 11,
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BUS_TAT = 12,
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SIMPLE_FIX = 13,
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SIMPLE_RAND = 14,
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SIMPLE_RAND_2W = 15,
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SIMPLE_RAND_FIXD = 16,
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SIMPLE_RA_RD_WR = 17,
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SIMPLE_RA_RD_R = 18,
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SIMPLE_RA_FD_R = 19,
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SIMPLE_RA_FD_R_INF = 20,
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SIMPLE_SA_FD_R = 21,
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SIMPLE_RA_FD_W = 22,
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INFINITE = 23,
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WR_ONLY = 24,
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W_ONLY = 25,
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R_ONLY = 26,
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W_ONLY_RAND = 27,
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R_ONLY_RAND = 28,
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R_ONLY_MULTI = 29,
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SHORT = 30,
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SIMPLE_RAND_BARI = 31,
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W_R_INFINITE = 32,
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W_R_RAND_INFINITE = 33,
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R_INFINITE1 = 34,
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R_INFINITE_RF = 35,
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MARCH = 36,
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SIMPLE_FIX_RF = 37,
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SHMOO_STRESS = 38,
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SIMPLE_RAND_RA = 39,
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SIMPLE_FIX_RA = 40,
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SIMPLE_FIX_RF_RA = 41,
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TEST_RR = 42,
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TEST_RF = 43,
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W_ONLY_INFINITE_RAND = 44,
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MCB_2D_CUP_SEQ = 45,
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MCB_2D_CUP_RAND = 46,
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SHMOO_STRESS_INFINITE = 47,
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HYNIX_1_COL = 48,
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RMWFIX = 49,
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RMWFIX_I = 50,
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W_INFINITE = 51,
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R_INFINITE = 52,
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};
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} // namespace mcbist
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///
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/// @brief Supported DIMM speed equality deliberations
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///

‎src/import/generic/procedures/xml/error_info/generic_error.xml

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@@ -392,4 +392,52 @@
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</deconfigure>
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</hwpError>
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<hwpError>
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<rc>RC_MSS_ZERO_FREQ_OR_SIZE</rc>
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<description>
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An zero memory frequency was passed to calculate min cmd gap
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</description>
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<ffdc>FREQ</ffdc>
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<ffdc>SIZE</ffdc>
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<callout>
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<procedure>CODE</procedure>
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<priority>HIGH</priority>
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</callout>
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</hwpError>
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<hwpError>
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<rc>RC_MSS_MEMDIAGS_INVALID_PATTERN_INDEX</rc>
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<description>An invalid pattern index was passed to the pattern loader</description>
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<ffdc>INDEX</ffdc>
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<ffdc>MC_TYPE</ffdc>
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<callout>
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<procedure>CODE</procedure>
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<priority>HIGH</priority>
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</callout>
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</hwpError>
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<hwpError>
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<rc>RC_MSS_MCBIST_PROGRAM_TOO_BIG</rc>
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<description>MCBIST program larger than currently supported size</description>
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<ffdc>PROGRAM_LENGTH</ffdc>
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<ffdc>TARGET</ffdc>
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<ffdc>MC_TYPE</ffdc>
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<callout>
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<procedure>CODE</procedure>
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<priority>HIGH</priority>
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</callout>
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</hwpError>
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<hwpError>
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<rc>RC_MSS_MCBIST_INVALID_ADDRESS_PAIR_INDEX</rc>
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<description>An invalid address pair index</description>
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<ffdc>INDEX</ffdc>
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<ffdc>MC_TYPE</ffdc>
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<ffdc>TARGET</ffdc>
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<callout>
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<procedure>CODE</procedure>
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<priority>HIGH</priority>
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</callout>
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</hwpError>
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</hwpErrors>

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