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Ashishsgupta2m
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p9_ppe_commands : Enhanced single step
Change-Id: I7dfd4a1cde9147b011584a8404a3f73f2412ff24 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30086 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47134 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H

Lines changed: 25 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -38,15 +38,22 @@
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#define __P9_PPE_UTILS_H__
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typedef struct
4040
{
41-
uint16_t number;
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uint16_t number;
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uint32_t value;
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} PPERegValue_t;
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typedef struct
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{
47+
PPERegValue_t reg;
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std::string name;
4349
} PPEReg_t;
4450

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typedef struct
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{
47-
PPEReg_t reg;
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uint32_t value;
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} PPERegValue_t;
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uint16_t number;
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std::string name;
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} PPEReg_num_name_t;
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typedef struct
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{
@@ -100,17 +107,18 @@ enum PPE_XIRS
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XIR_SPRG0,
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};
102109

103-
enum PPE_SPECIAL_ACCESS
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{
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MSR,
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CR,
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};
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//enum PPE_SPECIAL_ACCESS
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//{
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// MSR,
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// CR,
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//};
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enum PPE_SPRS
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{
110117
CTR = 9,
111118
DACR = 316,
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DBCR = 308,
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DEC = 22,
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EDR = 61,
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IVPR = 63,
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ISR = 62,
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LR = 8,
@@ -121,7 +129,14 @@ enum PPE_SPRS
121129
SRR1 = 27,
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TCR = 340,
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TSR = 336,
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XER = 1, //336,
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XER = 1,
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//Some unique identification no. FOR OTHER REGS(non sprn)
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XSR = 4200,
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IAR = 2,
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IR = 3,
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MSR = 42,
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CR = 420,
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};
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