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Zc support #1559

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silabs-hfegran
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Signed-off-by: Henrik Fegran Henrik.Fegran@silabs.com

Signed-off-by: Henrik Fegran <Henrik.Fegran@silabs.com>
@silabs-hfegran
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silabs-hfegran commented Jan 2, 2023

Currently in draft state - we need toolchain fixes and RTL updates to proceed with this.
RTL:

  • Needs update to 1.0.0-RC5.7 specification (Remove zcmb, jt/jalt split updates)

Toolchain:

  • Currently not matching latest psABI spec proposal naming conventions and jvt-location (.text.tbljal vs .riscv.jvt)
  • JVT table generation is inconsistent when not using the --zcmt-force-table-jump flag, which is incompatible with riscv-dv generated code.

Changes to riscv-dv: https://github.com/silabs-hfegran/riscv-dv/compare/9c2b007..7bf5f20

TODO: link issues from core-v-binutils repo when created

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Hi @silabs-hfegran can you provide insight into why this PR was closed without merging?

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Hi @silabs-hfegran can you provide insight into why this PR was closed without merging?

Because it was replaced by PR #1702 and #1728

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