Functional verification project for the CORE-V family of RISC-V cores. This project is under active development.
The OpenHW Group CV32E40P is now live!
This repository no longer contains a local copy of the RTL. The RTL is cloned from the appropriate core-v-cores repository as needed.
First, have a look at the OpenHW Group's website to learn a bit more about who we are and what we are doing.
If you want to run a simulation there are two options:
- To run the CORE testbench (based on the RI5CY testbench) and associated testcases, go to
cv32/sim/coreand read the README.
- To run the CV32E40P UVM environment, go to
cv32/sim/uvmt_cv32and read the README.
Note that the ability to run tests from
cv32/tests/corehas been depreciated. The README in that location is now out-of-date and Makefile no longer works. These will be removed altogether in the not-to-distant future.
Directory Structure of this Repo
Explainer for the CI flow used by CORE-V-VERIF.
Empty sub-directory into which the RTL from one or more of the CORE-V-CORES repositories is cloned.
Verification Environments, testbenches, testcases and simulation Makefiles for the CV32E cores.
Verification Environments, testbenches, testcases and simulation Makefiles for the CV64A cores.
Empty. Please see the CORE-V-DOCS repository.
Common components for the CV32 and CV64 verification environments.