@@ -835,46 +835,33 @@ MacroLogicVNode* MacroLogicVNode::make(PhaseGVN& gvn, Node* in1, Node* in2, Node
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Node* VectorNode::degenerate_vector_rotate (Node* src, Node* cnt, bool is_rotate_left,
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int vlen, BasicType bt, PhaseGVN* phase) {
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- int shiftLOpc;
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- int shiftROpc;
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- Node* shiftLCnt = NULL ;
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- Node* shiftRCnt = NULL ;
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+ assert (bt == T_INT || bt == T_LONG, " sanity" );
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const TypeVect* vt = TypeVect::make (bt, vlen);
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+ int shift_mask = (bt == T_INT) ? 0x1F : 0x3F ;
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+ int shiftLOpc = (bt == T_INT) ? Op_LShiftI : Op_LShiftL;
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+ int shiftROpc = (bt == T_INT) ? Op_URShiftI: Op_URShiftL;
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+
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// Compute shift values for right rotation and
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// later swap them in case of left rotation.
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- if (cnt->is_Con ()) {
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+ Node* shiftRCnt = NULL ;
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+ Node* shiftLCnt = NULL ;
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+ if (cnt->is_Con () && cnt->bottom_type ()->isa_int ()) {
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// Constant shift case.
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- if (bt == T_INT) {
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- int shift = cnt->get_int () & 31 ;
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- shiftRCnt = phase->intcon (shift);
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- shiftLCnt = phase->intcon (32 - shift);
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- shiftLOpc = Op_LShiftI;
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- shiftROpc = Op_URShiftI;
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- } else {
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- int shift = cnt->get_int () & 63 ;
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- shiftRCnt = phase->intcon (shift);
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- shiftLCnt = phase->intcon (64 - shift);
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- shiftLOpc = Op_LShiftL;
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- shiftROpc = Op_URShiftL;
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- }
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+ int shift = cnt->get_int () & shift_mask;
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+ shiftRCnt = phase->intcon (shift);
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+ shiftLCnt = phase->intcon (shift_mask + 1 - shift);
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} else {
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// Variable shift case.
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assert (VectorNode::is_invariant_vector (cnt), " Broadcast expected" );
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cnt = cnt->in (1 );
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- if (bt == T_INT) {
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- shiftRCnt = phase->transform (new AndINode (cnt, phase->intcon (31 )));
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- shiftLCnt = phase->transform (new SubINode (phase->intcon (32 ), shiftRCnt));
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- shiftLOpc = Op_LShiftI;
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- shiftROpc = Op_URShiftI;
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- } else {
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+ if (bt == T_LONG) {
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+ // Shift count vector for Rotate vector has long elements too.
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assert (cnt->Opcode () == Op_ConvI2L, " ConvI2L expected" );
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cnt = cnt->in (1 );
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- shiftRCnt = phase->transform (new AndINode (cnt, phase->intcon (63 )));
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- shiftLCnt = phase->transform (new SubINode (phase->intcon (64 ), shiftRCnt));
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- shiftLOpc = Op_LShiftL;
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- shiftROpc = Op_URShiftL;
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}
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+ shiftRCnt = phase->transform (new AndINode (cnt, phase->intcon (shift_mask)));
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+ shiftLCnt = phase->transform (new SubINode (phase->intcon (shift_mask + 1 ), shiftRCnt));
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}
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// Swap the computed left and right shift counts.
@@ -908,86 +895,3 @@ Node* RotateRightVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
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return NULL ;
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}
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- Node* OrVNode::Ideal (PhaseGVN* phase, bool can_reshape) {
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- int lopcode = in (1 )->Opcode ();
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- int ropcode = in (2 )->Opcode ();
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- const TypeVect* vt = bottom_type ()->is_vect ();
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- int vec_len = vt->length ();
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- BasicType bt = vt->element_basic_type ();
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-
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- // Vector Rotate operations inferencing, this will be useful when vector
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- // operations are created via non-SLP route i.e. (VectorAPI).
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- if (Matcher::match_rule_supported_vector (Op_RotateLeftV, vec_len, bt) &&
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- ((ropcode == Op_LShiftVI && lopcode == Op_URShiftVI) ||
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- (ropcode == Op_LShiftVL && lopcode == Op_URShiftVL)) &&
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- in (1 )->in (1 ) == in (2 )->in (1 )) {
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- assert (Op_RShiftCntV == in (1 )->in (2 )->Opcode (), " LShiftCntV operand expected" );
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- assert (Op_LShiftCntV == in (2 )->in (2 )->Opcode (), " RShiftCntV operand expected" );
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- Node* lshift = in (1 )->in (2 )->in (1 );
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- Node* rshift = in (2 )->in (2 )->in (1 );
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- int mod_val = bt == T_LONG ? 64 : 32 ;
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- int shift_mask = bt == T_LONG ? 0x3F : 0x1F ;
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- // val >> norm_con_shift | val << (32 - norm_con_shift) => rotate_right val ,
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- // norm_con_shift
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- if (lshift->is_Con () && rshift->is_Con () &&
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- ((lshift->get_int () & shift_mask) ==
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- (mod_val - (rshift->get_int () & shift_mask)))) {
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- return new RotateRightVNode (
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- in (1 )->in (1 ), phase->intcon (lshift->get_int () & shift_mask), vt);
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- }
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- if (lshift->Opcode () == Op_AndI && rshift->Opcode () == Op_AndI &&
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- lshift->in (2 )->is_Con () && rshift->in (2 )->is_Con () &&
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- lshift->in (2 )->get_int () == (mod_val - 1 ) &&
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- rshift->in (2 )->get_int () == (mod_val - 1 )) {
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- lshift = lshift->in (1 );
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- rshift = rshift->in (1 );
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- // val << var_shift | val >> (0/32 - var_shift) => rotate_left val ,
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- // var_shift
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- if (lshift->Opcode () == Op_SubI && lshift->in (2 ) == rshift &&
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- lshift->in (1 )->is_Con () &&
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- (lshift->in (1 )->get_int () == 0 ||
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- lshift->in (1 )->get_int () == mod_val)) {
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- Node* rotate_cnt = phase->transform (new ReplicateINode (rshift, vt));
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- return new RotateLeftVNode (in (1 )->in (1 ), rotate_cnt, vt);
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- }
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- }
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- }
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-
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- if (Matcher::match_rule_supported_vector (Op_RotateRightV, vec_len, bt) &&
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- ((ropcode == Op_URShiftVI && lopcode == Op_LShiftVI) ||
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- (ropcode == Op_URShiftVL && lopcode == Op_LShiftVL)) &&
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- in (1 )->in (1 ) == in (2 )->in (1 )) {
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- assert (Op_LShiftCntV == in (1 )->in (2 )->Opcode (), " RShiftCntV operand expected" );
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- assert (Op_RShiftCntV == in (2 )->in (2 )->Opcode (), " LShiftCntV operand expected" );
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- Node* rshift = in (1 )->in (2 )->in (1 );
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- Node* lshift = in (2 )->in (2 )->in (1 );
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- int mod_val = bt == T_LONG ? 64 : 32 ;
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- int shift_mask = bt == T_LONG ? 0x3F : 0x1F ;
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- // val << norm_con_shift | val >> (32 - norm_con_shift) => rotate_left val
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- // , norm_con_shift
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- if (rshift->is_Con () && lshift->is_Con () &&
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- ((rshift->get_int () & shift_mask) ==
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- (mod_val - (lshift->get_int () & shift_mask)))) {
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- return new RotateLeftVNode (
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- in (1 )->in (1 ), phase->intcon (rshift->get_int () & shift_mask), vt);
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- }
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- if (lshift->Opcode () == Op_AndI && rshift->Opcode () == Op_AndI &&
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- lshift->in (2 )->is_Con () && rshift->in (2 )->is_Con () &&
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- rshift->in (2 )->get_int () == (mod_val - 1 ) &&
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- lshift->in (2 )->get_int () == (mod_val - 1 )) {
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- rshift = rshift->in (1 );
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- lshift = lshift->in (1 );
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- // val >> var_shift | val << (0/32 - var_shift) => rotate_right val ,
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- // var_shift
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- if (rshift->Opcode () == Op_SubI && rshift->in (2 ) == lshift &&
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- rshift->in (1 )->is_Con () &&
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- (rshift->in (1 )->get_int () == 0 ||
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- rshift->in (1 )->get_int () == mod_val)) {
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- Node* rotate_cnt = phase->transform (new ReplicateINode (lshift, vt));
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- return new RotateRightVNode (in (1 )->in (1 ), rotate_cnt, vt);
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- }
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- }
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- }
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- return NULL ;
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- }
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-
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