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8290082: [PPC64] ZGC C2 load barrier stub needs to preserve vector registers #9453

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TheRealMDoerr
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@TheRealMDoerr TheRealMDoerr commented Jul 11, 2022

Preserve volatile vector registers in ZGC C2 load barrier stub.


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  • JDK-8290082: [PPC64] ZGC C2 load barrier stub needs to preserve vector registers

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bridgekeeper bot commented Jul 11, 2022

👋 Welcome back mdoerr! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

@openjdk openjdk bot added the rfr Pull request is ready for review label Jul 11, 2022
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@TheRealMDoerr The following label will be automatically applied to this pull request:

  • hotspot

When this pull request is ready to be reviewed, an "RFR" email will be sent to the corresponding mailing list. If you would like to change these labels, use the /label pull request command.

@openjdk openjdk bot added the hotspot hotspot-dev@openjdk.org label Jul 11, 2022
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mlbridge bot commented Jul 11, 2022

Webrevs

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Looks good. Thanks Martin!

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@TheRealMDoerr This change now passes all automated pre-integration checks.

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8290082: [PPC64] ZGC C2 load barrier stub needs to preserve vector registers

Reviewed-by: eosterlund, rrich

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@openjdk openjdk bot added the ready Pull request is ready to be integrated label Jul 11, 2022
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Thanks for the prompt review! I have noticed that the first version may use more space below SP than allowed by ABI. 288 Bytes below SP are "volatile program storage", but we may use more when including the vector registers. I had to change the save & restore sequence a bit.

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/label hotspot-compiler

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Does this need to be fixed in jdk19?

@openjdk openjdk bot added the hotspot-compiler hotspot-compiler-dev@openjdk.org label Jul 11, 2022
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Would be nice to have in 19, but it doesn't apply cleanly. There is a workaround. I prefer avoiding merging work for Oracle employees. We need it in 17u and 21 LTS.

} else if (vm_reg->is_VectorSRegister()) {
assert(SuperwordUseVSX, "or should not reach here");
VectorSRegister vs_reg = vm_reg->as_VectorSRegister();
if (vs_reg->encoding() >= VSR32->encoding() && vs_reg->encoding() <= VSR51->encoding()) {
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Why VSR32 as lower bound? I read in ppc.ad

1st 32 VSRs are aliases for the FPRs wich are already defined above.

Could you please help and explain what this means?

Why VSR51 as upper bound?

I'd suggest to update the comment in register_ppc.hpp and explain the vector scalar registers.
What is the difference between vector and vector scalar registers?

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Thanks for looking at it!
VSRs are not separate registers. They contain the regular FPRs (mapped to 0-31) and VRs (mapped to 32-63). FPRs are managed separately while the VRs are not defined elsewhere in the ppc.ad file. There are instructions which operate on VSRs and can access FPRs and VRs. This was tricky to implement in hotspot (JDK-8188139 and many follow-up fixes).
Only the VRs VR0-VR19 are volatile (see register_ppc.hpp), so only these ones need spilling. (Same is done for other register types.)
VR0-VR19 = VSR32-VSR51
Note that only these ones are currently used by C2 (see reg_class vs_reg in ppc.ad). Reason is that we currently don't preserve the non-volatile ones in the Java entry frame.

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Thanks for looking at it! VSRs are not separate registers. They contain the
regular FPRs (mapped to 0-31) and VRs (mapped to 32-63). FPRs are managed
separately while the VRs are not defined elsewhere in the ppc.ad file.

Thanks. I think this should be better explained in register_ppc.hpp.

There are instructions which operate on VSRs and can access FPRs and VRs. This
was tricky to implement in hotspot
(JDK-8188139 and many follow-up
fixes). Only the VRs VR0-VR19 are volatile (see register_ppc.hpp), so only
these ones need spilling. (Same is done for other register types.) VR0-VR19 =
VSR32-VSR51
Note that only these ones are currently used by C2 (see reg_class vs_reg in ppc.ad). Reason is that we currently don't preserve the
non-volatile ones in the Java entry frame.

I see. VSR52-VSR64 are declared SOC in ppc.ad. Shouldn't they be SOE then?

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I've added a comment to register_ppc.hpp.
Right, they should be SOE. Changed. Note that this doesn't have any effect because the SOE registers are not allocated by C2. But should get fixed to avoid confusion and for possible future usage.

@TheRealMDoerr TheRealMDoerr force-pushed the 8290082_PPC64_ZGC_C2_load_barrier_VSR branch from 2d8fa98 to f6d238e Compare July 12, 2022 09:39
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@TheRealMDoerr Please do not rebase or force-push to an active PR as it invalidates existing review comments. All changes will be squashed into a single commit automatically when integrating. See OpenJDK Developers’ Guide for more information.

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Thanks Martin, your changes looks good to me now.

The commenting in register_ppc.hpp could still be improved though. E.g. the comment refers to v and vs registers but the declared names are VR and VSR. Probably the declared names should be changed but that's nothing to be done in this pr.

Thanks, Richard.

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Thanks for the reviews! I just fixed a typo in a comment.

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/integrate

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openjdk bot commented Jul 12, 2022

Going to push as commit 393dc7a.
Since your change was applied there have been 3 commits pushed to the master branch:

  • e5491a2: 8289910: unify os::message_box across posix platforms
  • 04c47da: 8289768: Clean up unused code
  • 3b9059a: 8290083: ResponseBodyBeforeError: AssertionError or SSLException: Unsupported or unrecognized SSL message

Your commit was automatically rebased without conflicts.

@openjdk openjdk bot added the integrated Pull request has been integrated label Jul 12, 2022
@openjdk openjdk bot closed this Jul 12, 2022
@TheRealMDoerr TheRealMDoerr deleted the 8290082_PPC64_ZGC_C2_load_barrier_VSR branch July 12, 2022 13:32
@openjdk openjdk bot removed ready Pull request is ready to be integrated rfr Pull request is ready for review labels Jul 12, 2022
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@TheRealMDoerr Pushed as commit 393dc7a.

💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored.

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