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Lois Foltanrose00
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8230505: Replace JVM type comparisons to T_OBJECT and T_ARRAY with call to is_reference_type
Consistently use is_reference_type when comparing type for T_OBJECT or T_ARRAY. Co-authored-by: John Rose <john.r.rose@oracle.com> Reviewed-by: dlong, coleenp, hseigel
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67 files changed

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src/hotspot/cpu/aarch64/c1_FrameMap_aarch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
33
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
44
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
55
*
@@ -45,7 +45,7 @@ LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) {
4545
Register reg2 = r_2->as_Register();
4646
assert(reg2 == reg, "must be same register");
4747
opr = as_long_opr(reg);
48-
} else if (type == T_OBJECT || type == T_ARRAY) {
48+
} else if (is_reference_type(type)) {
4949
opr = as_oop_opr(reg);
5050
} else if (type == T_METADATA) {
5151
opr = as_metadata_opr(reg);

src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -728,7 +728,7 @@ void LIR_Assembler::reg2reg(LIR_Opr src, LIR_Opr dest) {
728728
move_regs(src->as_register(), dest->as_register());
729729

730730
} else if (dest->is_double_cpu()) {
731-
if (src->type() == T_OBJECT || src->type() == T_ARRAY) {
731+
if (is_reference_type(src->type()) {
732732
// Surprising to me but we can see move of a long to t_object
733733
__ verify_oop(src->as_register());
734734
move_regs(src->as_register(), dest->as_register_lo());
@@ -756,7 +756,7 @@ void LIR_Assembler::reg2reg(LIR_Opr src, LIR_Opr dest) {
756756

757757
void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack) {
758758
if (src->is_single_cpu()) {
759-
if (type == T_ARRAY || type == T_OBJECT) {
759+
if (is_reference_type(type)) {
760760
__ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix()));
761761
__ verify_oop(src->as_register());
762762
} else if (type == T_METADATA || type == T_DOUBLE) {
@@ -794,7 +794,7 @@ void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_Patch
794794
return;
795795
}
796796

797-
if (type == T_ARRAY || type == T_OBJECT) {
797+
if (is_reference_type(type)) {
798798
__ verify_oop(src->as_register());
799799

800800
if (UseCompressedOops && !wide) {
@@ -869,7 +869,7 @@ void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) {
869869
assert(dest->is_register(), "should not call otherwise");
870870

871871
if (dest->is_single_cpu()) {
872-
if (type == T_ARRAY || type == T_OBJECT) {
872+
if (is_reference_type(type)) {
873873
__ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix()));
874874
__ verify_oop(dest->as_register());
875875
} else if (type == T_METADATA) {
@@ -1019,7 +1019,7 @@ void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_Patch
10191019
ShouldNotReachHere();
10201020
}
10211021

1022-
if (type == T_ARRAY || type == T_OBJECT) {
1022+
if (is_reference_type(type)) {
10231023
if (UseCompressedOops && !wide) {
10241024
__ decode_heap_oop(dest->as_register());
10251025
}
@@ -1227,8 +1227,8 @@ void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op) {
12271227
__ uxtw(len, len);
12281228

12291229
if (UseSlowPath ||
1230-
(!UseFastNewObjectArray && (op->type() == T_OBJECT || op->type() == T_ARRAY)) ||
1231-
(!UseFastNewTypeArray && (op->type() != T_OBJECT && op->type() != T_ARRAY))) {
1230+
(!UseFastNewObjectArray && is_reference_type(op->type())) ||
1231+
(!UseFastNewTypeArray && !is_reference_type(op->type()))) {
12321232
__ b(*op->stub()->entry());
12331233
} else {
12341234
Register tmp1 = op->tmp1()->as_register();
@@ -1948,10 +1948,10 @@ void LIR_Assembler::comp_op(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
19481948
if (opr2->is_single_cpu()) {
19491949
// cpu register - cpu register
19501950
Register reg2 = opr2->as_register();
1951-
if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) {
1951+
if (is_reference_type(opr1->type())) {
19521952
__ cmpoop(reg1, reg2);
19531953
} else {
1954-
assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "cmp int, oop?");
1954+
assert(!is_reference_type(opr2->type()), "cmp int, oop?");
19551955
__ cmpw(reg1, reg2);
19561956
}
19571957
return;
@@ -2243,7 +2243,7 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
22432243
CodeStub* stub = op->stub();
22442244
int flags = op->flags();
22452245
BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL;
2246-
if (basic_type == T_ARRAY) basic_type = T_OBJECT;
2246+
if (is_reference_type(basic_type)) basic_type = T_OBJECT;
22472247

22482248
// if we don't know anything, just go through the generic arraycopy
22492249
if (default_type == NULL // || basic_type == T_OBJECT
@@ -3131,7 +3131,7 @@ void LIR_Assembler::peephole(LIR_List *lir) {
31313131
void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp_op) {
31323132
Address addr = as_Address(src->as_address_ptr());
31333133
BasicType type = src->type();
3134-
bool is_oop = type == T_OBJECT || type == T_ARRAY;
3134+
bool is_oop = is_reference_type(type);
31353135

31363136
void (MacroAssembler::* add)(Register prev, RegisterOrConstant incr, Register addr);
31373137
void (MacroAssembler::* xchg)(Register prev, Register newv, Register addr);

src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -733,7 +733,7 @@ LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_
733733
new_value.load_item();
734734
cmp_value.load_item();
735735
LIR_Opr result = new_register(T_INT);
736-
if (type == T_OBJECT || type == T_ARRAY) {
736+
if (is_reference_type(type)) {
737737
__ cas_obj(addr, cmp_value.result(), new_value.result(), new_register(T_INT), new_register(T_INT), result);
738738
} else if (type == T_INT) {
739739
__ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
@@ -748,7 +748,7 @@ LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_
748748
}
749749

750750
LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
751-
bool is_oop = type == T_OBJECT || type == T_ARRAY;
751+
bool is_oop = is_reference_type(type);
752752
LIR_Opr result = new_register(type);
753753
value.load_item();
754754
assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");

src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -251,7 +251,7 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
251251

252252
void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
253253
Register dst, Address src, Register tmp1, Register tmp_thread) {
254-
bool on_oop = type == T_OBJECT || type == T_ARRAY;
254+
bool on_oop = is_reference_type(type);
255255
bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
256256
bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
257257
bool on_reference = on_weak || on_phantom;

src/hotspot/cpu/aarch64/gc/shared/modRefBarrierSetAssembler_aarch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -46,7 +46,7 @@ void ModRefBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, Decorat
4646

4747
void ModRefBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
4848
Address dst, Register val, Register tmp1, Register tmp2) {
49-
if (type == T_OBJECT || type == T_ARRAY) {
49+
if (is_reference_type(type)) {
5050
oop_store_at(masm, decorators, type, dst, val, tmp1, tmp2);
5151
} else {
5252
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);

src/hotspot/cpu/aarch64/gc/shenandoah/c1/shenandoahBarrierSetC1_aarch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2018, Red Hat, Inc. All rights reserved.
2+
* Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.
33
*
44
* This code is free software; you can redistribute it and/or modify it
55
* under the terms of the GNU General Public License version 2 only, as
@@ -94,7 +94,7 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRIt
9494
value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
9595
}
9696

97-
assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type");
97+
assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
9898
LIR_Opr tmp = gen->new_register(T_INT);
9999
__ xchg(access.resolved_addr(), value_opr, result, tmp);
100100

src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -317,7 +317,7 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm,
317317

318318
void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
319319
Register dst, Address src, Register tmp1, Register tmp_thread) {
320-
bool on_oop = type == T_OBJECT || type == T_ARRAY;
320+
bool on_oop = is_reference_type(type);
321321
bool not_in_heap = (decorators & IN_NATIVE) != 0;
322322
bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
323323
bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
@@ -352,7 +352,7 @@ void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet d
352352

353353
void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
354354
Address dst, Register val, Register tmp1, Register tmp2) {
355-
bool on_oop = type == T_OBJECT || type == T_ARRAY;
355+
bool on_oop = is_reference_type(type);
356356
if (!on_oop) {
357357
BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
358358
return;

src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,7 @@ void ZBarrierSetAssembler::store_at(MacroAssembler* masm,
127127
Register tmp1,
128128
Register tmp2) {
129129
// Verify value
130-
if (type == T_OBJECT || type == T_ARRAY) {
130+
if (is_reference_type(type)) {
131131
// Note that src could be noreg, which means we
132132
// are storing null and can skip verification.
133133
if (val != noreg) {

src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1952,7 +1952,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
19521952
__ reset_last_Java_frame(false);
19531953

19541954
// Unbox oop result, e.g. JNIHandles::resolve result.
1955-
if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
1955+
if (is_reference_type(ret_type)) {
19561956
__ resolve_jobject(r0, rthread, rscratch2);
19571957
}
19581958

src/hotspot/cpu/sparc/c1_FrameMap_sparc.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -51,7 +51,7 @@ LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool outgoing) {
5151
}
5252
if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) {
5353
opr = as_long_opr(reg);
54-
} else if (type == T_OBJECT || type == T_ARRAY) {
54+
} else if (is_reference_type(type)) {
5555
opr = as_oop_opr(reg);
5656
} else if (type == T_METADATA) {
5757
opr = as_metadata_opr(reg);

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