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Commit a25fb03

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author
Thomas Schatzl
committed
8256406: G1 x86 C1/Interpreter post write barrier always uses 32 bit to access variable sized PtrQueue::_index
Reviewed-by: shade
1 parent f576628 commit a25fb03

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2 files changed

+14
-13
lines changed

2 files changed

+14
-13
lines changed

src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp

Lines changed: 13 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#include "gc/g1/heapRegion.hpp"
3333
#include "interpreter/interp_masm.hpp"
3434
#include "runtime/sharedRuntime.hpp"
35+
#include "utilities/debug.hpp"
3536
#include "utilities/macros.hpp"
3637
#ifdef COMPILER1
3738
#include "c1/c1_LIRAssembler.hpp"
@@ -264,6 +265,8 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
264265
Register thread,
265266
Register tmp,
266267
Register tmp2) {
268+
// Generated code assumes that buffer index is pointer sized.
269+
STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t));
267270
#ifdef _LP64
268271
assert(thread == r15_thread, "must be");
269272
#endif // _LP64
@@ -314,18 +317,13 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
314317

315318
__ movb(Address(card_addr, 0), (int)G1CardTable::dirty_card_val());
316319

317-
__ cmpl(queue_index, 0);
318-
__ jcc(Assembler::equal, runtime);
319-
__ subl(queue_index, wordSize);
320-
__ movptr(tmp2, buffer);
321-
#ifdef _LP64
322-
__ movslq(rscratch1, queue_index);
323-
__ addq(tmp2, rscratch1);
324-
__ movq(Address(tmp2, 0), card_addr);
325-
#else
326-
__ addl(tmp2, queue_index);
327-
__ movl(Address(tmp2, 0), card_addr);
328-
#endif
320+
__ movptr(tmp2, queue_index);
321+
__ testptr(tmp2, tmp2);
322+
__ jcc(Assembler::zero, runtime);
323+
__ subptr(tmp2, wordSize);
324+
__ movptr(queue_index, tmp2);
325+
__ addptr(tmp2, buffer);
326+
__ movptr(Address(tmp2, 0), card_addr);
329327
__ jmp(done);
330328

331329
__ bind(runtime);
@@ -453,6 +451,9 @@ void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarri
453451
#define __ sasm->
454452

455453
void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
454+
// Generated code assumes that buffer index is pointer sized.
455+
STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t));
456+
456457
__ prologue("g1_pre_barrier", false);
457458
// arg0 : previous value of memory
458459

src/hotspot/share/gc/shared/ptrQueue.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,7 @@ class PtrQueue {
178178
return byte_offset_of(Derived, _index);
179179
}
180180

181-
static ByteSize byte_width_of_index() { return in_ByteSize(sizeof(size_t)); }
181+
static constexpr ByteSize byte_width_of_index() { return in_ByteSize(sizeof(size_t)); }
182182

183183
template<typename Derived>
184184
static ByteSize byte_offset_of_buf() {

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