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    16 repositories

    • verilog-axis

      Public
      Verilog AXI stream components for FPGA implementation
      Python
      •
      MIT License
      •229•0•0•0•Updated Jan 8, 2024Jan 8, 2024

    • Sublime-SystemVerilog

      Public
      SystemVerilog plugin for Sublime Text
      Python
      •
      Apache License 2.0
      •17•0•0•0•Updated Sep 9, 2023Sep 9, 2023

    • verilog-ethernet

      Public
      Verilog Ethernet components for FPGA implementation
      Verilog
      •
      MIT License
      •706•0•0•0•Updated Aug 11, 2023Aug 11, 2023

    • netbox

      Public
      The premier source of truth powering network automation. Open source under Apache 2. Public demo: https://demo.netbox.dev
      Python
      •
      Apache License 2.0
      •2.6k•0•0•0•Updated May 11, 2023May 11, 2023

    • netaddr

      Public
      A network address manipulation library for Python
      Python
      •
      Other
      •177•0•0•1•Updated May 4, 2023May 4, 2023

    • cocotb

      Public
      cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •512•0•0•0•Updated Aug 17, 2022Aug 17, 2022

    • vunit

      Public
      VUnit is a unit testing framework for VHDL/SystemVerilog
      VHDL
      •
      Other
      •263•0•0•0•Updated Aug 16, 2022Aug 16, 2022

    • svlint

      Public
      SystemVerilog linter
      Rust
      •
      MIT License
      •33•0•0•0•Updated Aug 12, 2022Aug 12, 2022

    • osvb

      Public
      Open Source Verification Bundle for VHDL and System Verilog
      Python
      •
      Apache License 2.0
      •7•0•0•0•Updated Jul 5, 2022Jul 5, 2022

    • eradicate

      Public
      Removes commented-out code from Python files
      Python
      •25•0•0•0•Updated Nov 1, 2021Nov 1, 2021

    • pytest-eradicate

      Public
      Pytest plugin to test for commented out code
      Python
      •5•0•0•0•Updated Jul 9, 2021Jul 9, 2021

    • kosia

      Public
      Kepler Open Source Interference Analysis tool (KOSIA)
      Python
      •
      GNU Affero General Public License v3.0
      •0•1•0•0•Updated Jul 9, 2021Jul 9, 2021

    • tle_generator

      Public
      Generate a text file of Two Line Elements (TLEs) from an ITU filing database (.mdb)
      Python
      •
      GNU Affero General Public License v3.0
      •0•0•0•0•Updated Jun 4, 2021Jun 4, 2021

    • pylibsensors3

      Public
      Python
      •
      GNU Lesser General Public License v2.1
      •0•0•0•0•Updated Oct 16, 2020Oct 16, 2020

    • verilog-axi

      Public
      Verilog AXI components for FPGA implementation
      Verilog
      •
      MIT License
      •448•0•0•0•Updated Aug 27, 2020Aug 27, 2020

    • Sublime-QMSV

      Public
      SublimeText3 bits for Quartus, ModelSim, and VUnit Integration mirror of https://phabricator.kairohm.dev/diffusion/10/
      SystemVerilog
      •
      GNU General Public License v3.0
      •1•0•0•0•Updated Sep 9, 2018Sep 9, 2018