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[stm32] simplifly peripheral clock setup
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There is now a convenience function in libopencm3 that makes the clock enable for peripherals easier across different STM families:
e.g.
rcc_periph_clock_enable(RCC_USART1);

closes #642
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@flixr
flixr committed Feb 22, 2014
1 parent e7f7192 commit 5c013a1
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Showing 30 changed files with 365 additions and 382 deletions.
42 changes: 21 additions & 21 deletions sw/airborne/arch/stm32/led_hw.h
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Expand Up @@ -36,43 +36,43 @@
*/
#ifndef LED_STP08

#define _LED_GPIO_CLK(i) i
#define _LED_GPIO(i) i
#define _LED_GPIO(i) i
#define _LED_GPIO_CLK(i) i
#define _LED_GPIO_PIN(i) i
#define _LED_GPIO_ON(i) i
#define _LED_GPIO_OFF(i) i
#define _LED_AFIO_REMAP(i) i

#define LED_GPIO_CLK(i) _LED_GPIO_CLK(LED_ ## i ## _GPIO_CLK)
#define LED_GPIO(i) _LED_GPIO(LED_ ## i ## _GPIO)
#define LED_GPIO_CLK(i) _LED_GPIO_CLK(LED_ ## i ## _GPIO_CLK)
#define LED_GPIO_PIN(i) _LED_GPIO_PIN(LED_ ## i ## _GPIO_PIN)
#define LED_GPIO_ON(i) _LED_GPIO_ON(LED_ ## i ## _GPIO_ON)
#define LED_GPIO_OFF(i) _LED_GPIO_OFF(LED_ ## i ## _GPIO_OFF)
#define LED_AFIO_REMAP(i) _LED_AFIO_REMAP(LED_ ## i ## _AFIO_REMAP)

/* set pin as output */
#if defined(STM32F1) || defined(STM32F2)
#define LED_INIT(i) { \
rcc_peripheral_enable_clock(&RCC_APB2ENR, \
LED_GPIO_CLK(i)); \
gpio_set_mode(LED_GPIO(i), \
GPIO_MODE_OUTPUT_50_MHZ, \
GPIO_CNF_OUTPUT_PUSHPULL, \
LED_GPIO_PIN(i)); \
LED_AFIO_REMAP(i); \
}
#define LED_GPIO_MODE(i) { \
gpio_set_mode(LED_GPIO(i), \
GPIO_MODE_OUTPUT_50_MHZ, \
GPIO_CNF_OUTPUT_PUSHPULL, \
LED_GPIO_PIN(i)); \
}
#elif defined(STM32F4)
#define LED_INIT(i) { \
rcc_peripheral_enable_clock(&RCC_AHB1ENR, \
LED_GPIO_CLK(i)); \
gpio_mode_setup(LED_GPIO(i), \
GPIO_MODE_OUTPUT, \
GPIO_PUPD_NONE, \
LED_GPIO_PIN(i)); \
LED_AFIO_REMAP(i); \
}
#define LED_GPIO_MODE(i) { \
gpio_mode_setup(LED_GPIO(i), \
GPIO_MODE_OUTPUT, \
GPIO_PUPD_NONE, \
LED_GPIO_PIN(i)); \
}
#endif

#define LED_INIT(i) { \
rcc_periph_clock_enable(LED_GPIO_CLK(i)); \
LED_GPIO_MODE(i); \
LED_AFIO_REMAP(i); \
}

#define LED_ON(i) LED_GPIO_ON(i)(LED_GPIO(i), LED_GPIO_PIN(i))
#define LED_OFF(i) LED_GPIO_OFF(i)(LED_GPIO(i), LED_GPIO_PIN(i))
#define LED_TOGGLE(i) gpio_toggle(LED_GPIO(i), LED_GPIO_PIN(i))
Expand Down
50 changes: 22 additions & 28 deletions sw/airborne/arch/stm32/mcu_periph/adc_arch.c
View file
Expand Up @@ -394,58 +394,52 @@ void register_adc_watchdog(uint32_t adc, uint8_t chan, uint16_t low, uint16_t hi
/*** PRIVATE FUNCTION DEFINITIONS ***/
/**************************************/

/** Configure and enable RCC for peripherals (ADC1, ADC2, Timer) */
static inline void adc_init_rcc( void )
{
#if USE_AD1 || USE_AD2 || USE_AD3
uint32_t timer;
volatile uint32_t *rcc_apbenr;
uint32_t rcc_apb;
#if defined(USE_AD_TIM4)
timer = TIM4;
rcc_apbenr = &RCC_APB1ENR;
rcc_apb = RCC_APB1ENR_TIM4EN;
#define TIM_ADC TIM4
#define RCC_TIM_ADC RCC_TIM4
#elif defined(USE_AD_TIM1)
timer = TIM1;
rcc_apbenr = &RCC_APB2ENR;
rcc_apb = RCC_APB2ENR_TIM1EN;
#define TIM_ADC TIM1
#define RCC_TIM_ADC RCC_TIM1
#else
timer = TIM2;
rcc_apbenr = &RCC_APB1ENR;
rcc_apb = RCC_APB1ENR_TIM2EN;
#define TIM_ADC TIM2
#define RCC_TIM_ADC RCC_TIM2
#endif

/** Configure and enable RCC for peripherals (ADC1, ADC2, Timer) */
static inline void adc_init_rcc( void )
{
#if USE_AD1 || USE_AD2 || USE_AD3
/* Timer peripheral clock enable. */
rcc_peripheral_enable_clock(rcc_apbenr, rcc_apb);
rcc_periph_clock_enable(RCC_TIM_ADC);
#if defined(STM32F4)
adc_set_clk_prescale(ADC_CCR_ADCPRE_BY2);
#endif

/* Enable ADC peripheral clocks. */
#if USE_AD1
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN);
rcc_periph_clock_enable(RCC_ADC1);
#endif
#if USE_AD2
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC2EN);
rcc_periph_clock_enable(RCC_ADC2);
#endif
#if USE_AD3
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC3EN);
rcc_periph_clock_enable(RCC_ADC3);
#endif

/* Time Base configuration */
timer_reset(timer);
timer_set_mode(timer, TIM_CR1_CKD_CK_INT,
timer_reset(TIM_ADC);
timer_set_mode(TIM_ADC, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
#if defined(STM32F1)
timer_set_period(timer, 0xFF);
timer_set_period(TIM_ADC, 0xFF);
#elif defined(STM32F4)
timer_set_period(timer, 0xFFFF);
timer_set_period(TIM_ADC, 0xFFFF);
#endif
timer_set_prescaler(timer, ADC_TIMER_PRESCALER);
//timer_set_clock_division(timer, 0x0);
timer_set_prescaler(TIM_ADC, ADC_TIMER_PRESCALER);
//timer_set_clock_division(TIM_ADC, 0x0);
/* Generate TRGO on every update. */
timer_set_master_mode(timer, TIM_CR2_MMS_UPDATE);
timer_enable_counter(timer);
timer_set_master_mode(TIM_ADC, TIM_CR2_MMS_UPDATE);
timer_enable_counter(TIM_ADC);

#endif // USE_AD1 || USE_AD2 || USE_AD3
}
Expand Down
14 changes: 9 additions & 5 deletions sw/airborne/arch/stm32/mcu_periph/can_arch.c
View file
Expand Up @@ -33,13 +33,17 @@
#include "mcu_periph/can_arch.h"
#include "mcu_periph/can.h"

#include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/f1/gpio.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/can.h>
#include <libopencm3/cm3/nvic.h>

#include "led.h"

#ifndef STM32F1
#error "CAN is currently only implemented for STM32F1"
#endif

#ifdef RTOS_PRIO
#define NVIC_USB_LP_CAN_RX0_IRQ_PRIO RTOS_PRIO+1
#else
Expand All @@ -54,9 +58,9 @@ void can_hw_init(void)
{

/* Enable peripheral clocks. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CAN1EN);
rcc_periph_clock_enable(RCC_AFIO);
rcc_periph_clock_enable(RCC_GPIOB);
rcc_periph_clock_enable(RCC_CAN1);

/* Remap the gpio pin if necessary. */
AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB;
Expand Down
70 changes: 31 additions & 39 deletions sw/airborne/arch/stm32/mcu_periph/gpio_arch.c
View file
Expand Up @@ -31,26 +31,51 @@
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/rcc.h>

#ifdef STM32F1
void gpio_enable_clock(uint32_t port) {
switch (port) {
case GPIOA:
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
rcc_periph_clock_enable(RCC_GPIOA);
break;
case GPIOB:
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
rcc_periph_clock_enable(RCC_GPIOB);
break;
case GPIOC:
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
rcc_periph_clock_enable(RCC_GPIOC);
break;
case GPIOD:
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPDEN);
rcc_periph_clock_enable(RCC_GPIOD);
break;
#ifdef GPIOE
case GPIOE:
rcc_periph_clock_enable(RCC_GPIOE);
break;
#endif
#ifdef GPIOF
case GPIOF:
rcc_periph_clock_enable(RCC_GPIOF);
break;
#endif
#ifdef GPIOG
case GPIOG:
rcc_periph_clock_enable(RCC_GPIOG);
break;
#endif
#ifdef GPIOH
case GPIOH:
rcc_periph_clock_enable(RCC_GPIOH);
break;
#endif
#ifdef GPIOI
case GPIOI:
rcc_periph_clock_enable(RCC_GPIOI);
break;
#endif
default:
break;
};
}

#ifdef STM32F1
void gpio_setup_output(uint32_t port, uint16_t pin) {
gpio_enable_clock(port);
gpio_set_mode(port, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, pin);
Expand All @@ -65,7 +90,7 @@ void gpio_setup_pin_af(uint32_t port, uint16_t pin, uint8_t af, bool_t is_output
gpio_enable_clock(port);
/* remap alternate function if needed */
if (af) {
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
rcc_periph_clock_enable(RCC_AFIO);
AFIO_MAPR |= af;
}
if (is_output)
Expand All @@ -80,39 +105,6 @@ void gpio_setup_pin_analog(uint32_t port, uint16_t pin) {
}

#elif defined STM32F4
void gpio_enable_clock(uint32_t port) {
switch (port) {
case GPIOA:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN);
break;
case GPIOB:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN);
break;
case GPIOC:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN);
break;
case GPIOD:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN);
break;
case GPIOE:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPEEN);
break;
case GPIOF:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPFEN);
break;
case GPIOG:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPGEN);
break;
case GPIOH:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPHEN);
break;
case GPIOI:
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPIEN);
break;
default:
break;
};
}

void gpio_setup_output(uint32_t port, uint16_t pin) {
gpio_enable_clock(port);
Expand Down
6 changes: 3 additions & 3 deletions sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
View file
Expand Up @@ -920,7 +920,7 @@ void i2c1_hw_init(void) {

/* Enable peripheral clocks -------------------------------------------------*/
/* Enable I2C1 clock */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_I2C1EN);
rcc_periph_clock_enable(RCC_I2C1);
/* Enable GPIO clock */
gpio_enable_clock(I2C1_GPIO_PORT);
#if defined(STM32F1)
Expand Down Expand Up @@ -1006,7 +1006,7 @@ void i2c2_hw_init(void) {

/* Enable peripheral clocks -------------------------------------------------*/
/* Enable I2C2 clock */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_I2C2EN);
rcc_periph_clock_enable(RCC_I2C2);
/* Enable GPIO clock */
gpio_enable_clock(I2C2_GPIO_PORT);
#if defined(STM32F1)
Expand Down Expand Up @@ -1093,7 +1093,7 @@ void i2c3_hw_init(void) {

/* Enable peripheral clocks -------------------------------------------------*/
/* Enable I2C3 clock */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_I2C3EN);
rcc_periph_clock_enable(RCC_I2C3);
/* Enable GPIO clock */
gpio_enable_clock(I2C3_GPIO_PORT_SCL);
gpio_mode_setup(I2C3_GPIO_PORT_SCL, GPIO_MODE_AF, GPIO_PUPD_NONE, I2C3_GPIO_SCL);
Expand Down
26 changes: 11 additions & 15 deletions sw/airborne/arch/stm32/mcu_periph/spi_arch.c
View file
Expand Up @@ -691,7 +691,7 @@ void spi1_arch_init(void) {


// Enable SPI1 Periph and gpio clocks
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_SPI1EN);
rcc_periph_clock_enable(RCC_SPI1);

// Configure GPIOs: SCK, MISO and MOSI
#ifdef STM32F1
Expand Down Expand Up @@ -736,9 +736,9 @@ void spi1_arch_init(void) {

// Enable SPI_1 DMA clock
#ifdef STM32F1
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN);
rcc_periph_clock_enable(RCC_DMA1);
#elif defined STM32F4
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_DMA2EN);
rcc_periph_clock_enable(RCC_DMA2);
#endif

// Enable SPI1 periph.
Expand Down Expand Up @@ -785,7 +785,7 @@ void spi2_arch_init(void) {


// Enable SPI2 Periph and gpio clocks
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_SPI2EN);
rcc_periph_clock_enable(RCC_SPI2);

// Configure GPIOs: SCK, MISO and MOSI
#ifdef STM32F1
Expand Down Expand Up @@ -828,11 +828,7 @@ void spi2_arch_init(void) {
spi_set_nss_high(SPI2);

// Enable SPI_2 DMA clock
#ifdef STM32F1
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN);
#elif defined STM32F4
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_DMA1EN);
#endif
rcc_periph_clock_enable(RCC_DMA1);

// Enable SPI2 periph.
spi_enable(SPI2);
Expand Down Expand Up @@ -879,7 +875,7 @@ void spi3_arch_init(void) {


// Enable SPI3 Periph and gpio clocks
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_SPI3EN);
rcc_periph_clock_enable(RCC_SPI3);

// Configure GPIOs: SCK, MISO and MOSI
#ifdef STM32F1
Expand Down Expand Up @@ -925,9 +921,9 @@ void spi3_arch_init(void) {

// Enable SPI_3 DMA clock
#ifdef STM32F1
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA2EN);
rcc_periph_clock_enable(RCC_DMA2);
#elif defined STM32F4
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_DMA1EN);
rcc_periph_clock_enable(RCC_DMA1);
#endif

// Enable SPI3 periph.
Expand Down Expand Up @@ -1253,7 +1249,7 @@ void spi1_slave_arch_init(void) {
spi1.status = SPIIdle;

// Enable SPI1 Periph and gpio clocks
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_SPI1EN);
rcc_periph_clock_enable(RCC_SPI1);

// Configure GPIOs: SCK, MISO and MOSI
// TODO configure lisa board files to use gpio_setup_pin_af function
Expand Down Expand Up @@ -1288,9 +1284,9 @@ void spi1_slave_arch_init(void) {

// Enable SPI_1 DMA clock
#ifdef STM32F1
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN);
rcc_periph_clock_enable(RCC_DMA1);
#elif defined STM32F4
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_DMA2EN);
rcc_periph_clock_enable(RCC_DMA2);
#endif

// Enable SPI1 periph.
Expand Down

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