GitHub - peshwara/ScalarProcessor: Functional verification of Scalar Processor using System Verilog in a layered approach covering randomization, functional verification, Interface, OOP concepts

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Functional verification of Scalar Processor using System Verilog in a layered approach covering randomization, functional verification, Interface, OOP concepts

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.gitattributes		.gitattributes
.gitignore		.gitignore
controlunit.sv		controlunit.sv
dataunit.sv		dataunit.sv
dut.sv		dut.sv
inf.sv		inf.sv
report.log		report.log
testbench.sv		testbench.sv

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Functional verification of Scalar Processor using System Verilog in a layered approach covering randomization, functional verification, Interface, OOP concepts

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