@@ -544,7 +544,7 @@ static void* dasm_labels[zend_lb_MAX];
544
544
|.endmacro
545
545
546
546
|.macro SSE_AVX_INS, sse_ins, avx_ins, op1, op2
547
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
547
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
548
548
| avx_ins op1, op2
549
549
|| } else {
550
550
| sse_ins op1, op2
@@ -586,7 +586,7 @@ static void* dasm_labels[zend_lb_MAX];
586
586
587
587
|.macro SSE_GET_LONG, reg, lval
588
588
|| if (lval == 0) {
589
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
589
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
590
590
| vxorps xmm(reg-ZREG_XMM0), xmm(reg-ZREG_XMM0), xmm(reg-ZREG_XMM0)
591
591
|| } else {
592
592
| xorps xmm(reg-ZREG_XMM0), xmm(reg-ZREG_XMM0)
@@ -601,7 +601,7 @@ static void* dasm_labels[zend_lb_MAX];
601
601
|.else
602
602
| mov r0, lval
603
603
|.endif
604
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
604
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
605
605
| vcvtsi2sd, xmm(reg-ZREG_XMM0), xmm(reg-ZREG_XMM0), r0
606
606
|| } else {
607
607
| cvtsi2sd, xmm(reg-ZREG_XMM0), r0
@@ -613,13 +613,13 @@ static void* dasm_labels[zend_lb_MAX];
613
613
|| if (Z_MODE(addr) == IS_CONST_ZVAL) {
614
614
| SSE_GET_LONG reg, Z_LVAL_P(Z_ZV(addr))
615
615
|| } else if (Z_MODE(addr) == IS_MEM_ZVAL) {
616
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
616
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
617
617
| vcvtsi2sd xmm(reg-ZREG_XMM0), xmm(reg-ZREG_XMM0), aword [Ra(Z_REG(addr))+Z_OFFSET(addr)]
618
618
|| } else {
619
619
| cvtsi2sd xmm(reg-ZREG_XMM0), aword [Ra(Z_REG(addr))+Z_OFFSET(addr)]
620
620
|| }
621
621
|| } else if (Z_MODE(addr) == IS_REG) {
622
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
622
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
623
623
| vcvtsi2sd xmm(reg-ZREG_XMM0), xmm(reg-ZREG_XMM0), Ra(Z_REG(addr))
624
624
|| } else {
625
625
| cvtsi2sd xmm(reg-ZREG_XMM0), Ra(Z_REG(addr))
@@ -897,7 +897,7 @@ static void* dasm_labels[zend_lb_MAX];
897
897
|| if (Z_TYPE_P(zv) == IS_DOUBLE) {
898
898
|| zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ? Z_REG(dst_addr) : ZREG_XMM0;
899
899
|| if (Z_DVAL_P(zv) == 0.0 && !is_signed(Z_DVAL_P(zv))) {
900
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
900
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
901
901
| vxorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
902
902
|| } else {
903
903
| xorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
@@ -951,7 +951,7 @@ static void* dasm_labels[zend_lb_MAX];
951
951
|| zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ?
952
952
|| Z_REG(dst_addr) : ((Z_MODE(res_addr) == IS_REG) ? Z_MODE(res_addr) : ZREG_XMM0);
953
953
|| if (Z_DVAL_P(zv) == 0.0 && !is_signed(Z_DVAL_P(zv))) {
954
- || if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
954
+ || if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
955
955
| vxorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
956
956
|| } else {
957
957
| xorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
@@ -1615,6 +1615,7 @@ static zend_bool use_last_vald_opline = 0;
1615
1615
static zend_bool track_last_valid_opline = 0;
1616
1616
static int jit_return_label = -1;
1617
1617
static uint32_t current_trace_num = 0;
1618
+ static uint32_t allowed_opt_flags = 0;
1618
1619
1619
1620
static void zend_jit_track_last_valid_opline(void)
1620
1621
{
@@ -2850,10 +2851,9 @@ static int zend_jit_setup(void)
2850
2851
zend_error(E_CORE_ERROR, "CPU doesn't support SSE2");
2851
2852
return FAILURE;
2852
2853
}
2853
- if (JIT_G(opt_flags)) {
2854
- if (!zend_cpu_supports(ZEND_CPU_FEATURE_AVX)) {
2855
- JIT_G(opt_flags) &= ~ZEND_JIT_CPU_AVX;
2856
- }
2854
+ allowed_opt_flags = 0;
2855
+ if (zend_cpu_supports(ZEND_CPU_FEATURE_AVX)) {
2856
+ allowed_opt_flags |= ZEND_JIT_CPU_AVX;
2857
2857
}
2858
2858
2859
2859
#if ZTS
@@ -4120,13 +4120,13 @@ static int zend_jit_inc_dec(dasm_State **Dst, const zend_op *opline, uint32_t op
4120
4120
}
4121
4121
| SSE_GET_ZVAL_DVAL tmp_reg, op1_addr
4122
4122
if (opline->opcode == ZEND_PRE_INC || opline->opcode == ZEND_POST_INC) {
4123
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4123
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4124
4124
| vaddsd xmm(tmp_reg-ZREG_XMM0), xmm(tmp_reg-ZREG_XMM0), qword [->one]
4125
4125
} else {
4126
4126
| addsd xmm(tmp_reg-ZREG_XMM0), qword [->one]
4127
4127
}
4128
4128
} else {
4129
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4129
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4130
4130
| vsubsd xmm(tmp_reg-ZREG_XMM0), xmm(tmp_reg-ZREG_XMM0), qword [->one]
4131
4131
} else {
4132
4132
| subsd xmm(tmp_reg-ZREG_XMM0), qword [->one]
@@ -4285,7 +4285,7 @@ static int zend_jit_math_long_long(dasm_State **Dst,
4285
4285
4286
4286
| SSE_GET_ZVAL_LVAL tmp_reg1, op1_addr
4287
4287
| SSE_GET_ZVAL_LVAL tmp_reg2, op2_addr
4288
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4288
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4289
4289
| AVX_MATH_REG opcode, tmp_reg1, tmp_reg1, tmp_reg2
4290
4290
} else {
4291
4291
| SSE_MATH_REG opcode, tmp_reg1, tmp_reg2
@@ -4315,7 +4315,7 @@ static int zend_jit_math_long_double(dasm_State **Dst,
4315
4315
(Z_MODE(res_addr) == IS_REG) ? Z_REG(res_addr) : ZREG_XMM0;
4316
4316
4317
4317
| SSE_GET_ZVAL_LVAL result_reg, op1_addr
4318
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4318
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4319
4319
| AVX_MATH opcode, result_reg, result_reg, op2_addr
4320
4320
} else {
4321
4321
| SSE_MATH opcode, result_reg, op2_addr
@@ -4348,7 +4348,7 @@ static int zend_jit_math_double_long(dasm_State **Dst,
4348
4348
result_reg = ZREG_XMM0;
4349
4349
}
4350
4350
| SSE_GET_ZVAL_LVAL result_reg, op2_addr
4351
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4351
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4352
4352
| AVX_MATH opcode, result_reg, result_reg, op1_addr
4353
4353
} else {
4354
4354
| SSE_MATH opcode, result_reg, op1_addr
@@ -4366,7 +4366,7 @@ static int zend_jit_math_double_long(dasm_State **Dst,
4366
4366
result_reg = ZREG_XMM0;
4367
4367
tmp_reg = ZREG_XMM1;
4368
4368
}
4369
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4369
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4370
4370
zend_reg op1_reg;
4371
4371
4372
4372
if (Z_MODE(op1_addr) == IS_REG) {
@@ -4426,7 +4426,7 @@ static int zend_jit_math_double_double(dasm_State **Dst,
4426
4426
result_reg = ZREG_XMM0;
4427
4427
}
4428
4428
4429
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
4429
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
4430
4430
zend_reg op1_reg;
4431
4431
zend_jit_addr val_addr;
4432
4432
@@ -8200,7 +8200,7 @@ static int zend_jit_bool_jmpznz(dasm_State **Dst, const zend_op *opline, uint32_
8200
8200
}
8201
8201
8202
8202
if ((op1_info & MAY_BE_ANY) == MAY_BE_DOUBLE) {
8203
- if (JIT_G(opt_flags) & ZEND_JIT_CPU_AVX) {
8203
+ if (JIT_G(opt_flags) & allowed_opt_flags & ZEND_JIT_CPU_AVX) {
8204
8204
| vxorps xmm0, xmm0, xmm0
8205
8205
} else {
8206
8206
| xorps xmm0, xmm0
0 commit comments