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1. Compressed-Sensing Compressed-Sensing Public

   The term Compressed Sensing was conceived by David L. Donoho in 2006. With the leverage of extra information in terms of sparsity, the signal can be reconstructed without performing the usual steps…

   Verilog 6 2

2. Discrete-Cosine-Transform-FPGA Discrete-Cosine-Transform-FPGA Public

   Discrete Cosine Transform (DCT) HDL code for FPGA implementation

   Verilog 3 2

3. BitonicSort-HLS BitonicSort-HLS Public

   C++ 2 3

4. BItonic-Sort-64IO BItonic-Sort-64IO Public

   C++ 1

5. NullAlgo72IO NullAlgo72IO Public

   Vivado-HLS null algorithm with 72 input (16Gbps) and output (16Gbps)

   VHDL 1

6. Zedboard-old Zedboard-old Public

   Forked from Digilent/Zedboard-old

   VHDL 1