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plasoc

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  1. axiplasma axiplasma Public

    AXI/MIPS SoC developed in VHDL with FreeRTOS port. Capable of running either preemptively or cooperatively.

    VHDL 7 1

  2. kernel-on-chip kernel-on-chip Public

    TBA

    VHDL 1

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  • axiplasma Public

    AXI/MIPS SoC developed in VHDL with FreeRTOS port. Capable of running either preemptively or cooperatively.

    plasoc/axiplasma’s past year of commit activity
    VHDL 7 MIT 1 0 0 Updated Mar 19, 2018
  • kernel-on-chip Public

    TBA

    plasoc/kernel-on-chip’s past year of commit activity
    VHDL 0 MIT 1 0 0 Updated May 26, 2017

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