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rs6000: mark tieable between INT and FLOAT
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Hi,

During discussing/review patches in maillist, we find more modes are
tieable, e.g. DI<->DF.  With some discussion, I drafted this patch
to mark more tieable modes.

Bootstrap and regtest pass on ppc64{,le}.
Is this ok for trunk?

BR,
Jeff (Jiufu)

gcc/ChangeLog:

	* config/rs6000/rs6000.cc (rs6000_modes_tieable_p): Mark more tieable
	modes.

gcc/testsuite/ChangeLog:

	* g++.target/powerpc/pr102024.C: Updated.
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Jiufu Guo authored and ouuleilei-bot committed Jan 6, 2023
1 parent a40c22c commit 14f6ec5
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Showing 2 changed files with 11 additions and 1 deletion.
9 changes: 9 additions & 0 deletions gcc/config/rs6000/rs6000.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1968,6 +1968,15 @@ rs6000_modes_tieable_p (machine_mode mode1, machine_mode mode2)
if (ALTIVEC_OR_VSX_VECTOR_MODE (mode2))
return false;

/* SFmode format (IEEE DP) in register would not as required,
So SFmode is restrict here. */
if (GET_MODE_CLASS (mode1) == MODE_FLOAT
&& GET_MODE_CLASS (mode2) == MODE_INT)
return GET_MODE_SIZE (mode2) == UNITS_PER_FP_WORD && mode1 != SFmode;
if (GET_MODE_CLASS (mode1) == MODE_INT
&& GET_MODE_CLASS (mode2) == MODE_FLOAT)
return GET_MODE_SIZE (mode1) == UNITS_PER_FP_WORD && mode2 != SFmode;

if (SCALAR_FLOAT_MODE_P (mode1))
return SCALAR_FLOAT_MODE_P (mode2);
if (SCALAR_FLOAT_MODE_P (mode2))
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3 changes: 2 additions & 1 deletion gcc/testsuite/g++.target/powerpc/pr102024.C
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,8 @@
// Test that a zero-width bit field in an otherwise homogeneous aggregate
// generates a psabi warning and passes arguments in GPRs.

// { dg-final { scan-assembler-times {\mstd\M} 4 } }
// { dg-final { scan-assembler-times {\mmtvsrd\M} 4 { target has_arch_pwr8 } } }
// { dg-final { scan-assembler-times {\mstd\M} 4 { target { ! has_arch_pwr8 } } } }

struct a_thing
{
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