Skip to content

Commit 0fbdf37

Browse files
KaigeFulijinxia
authored andcommitted
HV: instr_emul: Cleanup ASSERT
There so many ASSERT following the function vie_read_register and vm_get_seg_desc. It's better to move the ASSERT to those two functions and make the code more compact. Signed-off-by: Kaige Fu <kaige.fu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
1 parent e3302e8 commit 0fbdf37

File tree

1 file changed

+6
-24
lines changed

1 file changed

+6
-24
lines changed

hypervisor/arch/x86/guest/instr_emul.c

Lines changed: 6 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -246,6 +246,8 @@ vie_read_register(struct vcpu *vcpu, enum cpu_reg_name reg, uint64_t *rval)
246246
int error;
247247

248248
error = vm_get_register(vcpu, reg, rval);
249+
ASSERT(error == 0, "%s: error (%d) happens when getting reg",
250+
__func__, error);
249251

250252
return error;
251253
}
@@ -351,6 +353,9 @@ vie_update_register(struct vcpu *vcpu, enum cpu_reg_name reg,
351353
}
352354

353355
error = vm_set_register(vcpu, reg, val);
356+
ASSERT(error == 0, "%s: Error (%d) happens when update reg",
357+
__func__, error);
358+
354359
return error;
355360
}
356361

@@ -696,7 +701,6 @@ emulate_movs(struct vcpu *vcpu, __unused uint64_t gpa, struct vie *vie,
696701

697702
if (repeat != 0) {
698703
error = vie_read_register(vcpu, CPU_REG_RCX, &rcx);
699-
ASSERT(error == 0, "%s: error %d getting rcx", __func__, error);
700704

701705
/*
702706
* The count register is %rcx, %ecx or %cx depending on the
@@ -725,13 +729,8 @@ emulate_movs(struct vcpu *vcpu, __unused uint64_t gpa, struct vie *vie,
725729
(void)memcpy_s((char *)dstaddr, 16U, (char *)srcaddr, opsize);
726730

727731
error = vie_read_register(vcpu, CPU_REG_RSI, &rsi);
728-
ASSERT(error == 0, "%s: error %d getting rsi", __func__, error);
729-
730732
error = vie_read_register(vcpu, CPU_REG_RDI, &rdi);
731-
ASSERT(error == 0, "%s: error %d getting rdi", __func__, error);
732-
733733
error = vie_read_register(vcpu, CPU_REG_RFLAGS, &rflags);
734-
ASSERT(error == 0, "%s: error %d getting rflags", __func__, error);
735734

736735
if ((rflags & PSL_D) != 0U) {
737736
rsi -= opsize;
@@ -743,17 +742,14 @@ emulate_movs(struct vcpu *vcpu, __unused uint64_t gpa, struct vie *vie,
743742

744743
error = vie_update_register(vcpu, CPU_REG_RSI, rsi,
745744
vie->addrsize);
746-
ASSERT(error == 0, "%s: error %d updating rsi", __func__, error);
747745

748746
error = vie_update_register(vcpu, CPU_REG_RDI, rdi,
749747
vie->addrsize);
750-
ASSERT(error == 0, "%s: error %d updating rdi", __func__, error);
751748

752749
if (repeat != 0) {
753750
rcx = rcx - 1;
754751
error = vie_update_register(vcpu, CPU_REG_RCX,
755752
rcx, vie->addrsize);
756-
ASSERT(error == 0, "%s: error %d updating rcx", __func__, error);
757753

758754
/*
759755
* Repeat the instruction if the count register is not zero.
@@ -783,7 +779,6 @@ emulate_stos(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
783779

784780
if (repeat != 0) {
785781
error = vie_read_register(vcpu, CPU_REG_RCX, &rcx);
786-
ASSERT(error == 0, "%s: error %d getting rcx", __func__, error);
787782

788783
/*
789784
* The count register is %rcx, %ecx or %cx depending on the
@@ -795,18 +790,14 @@ emulate_stos(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
795790
}
796791

797792
error = vie_read_register(vcpu, CPU_REG_RAX, &val);
798-
ASSERT(error == 0, "%s: error %d getting rax", __func__, error);
799793

800794
error = memwrite(vcpu, gpa, val, opsize, arg);
801795
if (error != 0) {
802796
return error;
803797
}
804798

805799
error = vie_read_register(vcpu, CPU_REG_RDI, &rdi);
806-
ASSERT(error == 0, "%s: error %d getting rdi", __func__, error);
807-
808800
error = vie_read_register(vcpu, CPU_REG_RFLAGS, &rflags);
809-
ASSERT(error == 0, "%s: error %d getting rflags", __func__, error);
810801

811802
if ((rflags & PSL_D) != 0U) {
812803
rdi -= opsize;
@@ -816,13 +807,11 @@ emulate_stos(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
816807

817808
error = vie_update_register(vcpu, CPU_REG_RDI, rdi,
818809
vie->addrsize);
819-
ASSERT(error == 0, "%s: error %d updating rdi", __func__, error);
820810

821811
if (repeat != 0) {
822812
rcx = rcx - 1;
823813
error = vie_update_register(vcpu, CPU_REG_RCX,
824814
rcx, vie->addrsize);
825-
ASSERT(error == 0, "%s: error %d updating rcx", __func__, error);
826815

827816
/*
828817
* Repeat the instruction if the count register is not zero.
@@ -1318,13 +1307,9 @@ emulate_stack_op(struct vcpu *vcpu, uint64_t mmio_gpa, struct vie *vie,
13181307
}
13191308

13201309
error = vie_read_register(vcpu, CPU_REG_CR0, &cr0);
1321-
ASSERT(error == 0, "%s: error %d getting cr0", __func__, error);
1322-
13231310
error = vie_read_register(vcpu, CPU_REG_RFLAGS, &rflags);
1324-
ASSERT(error == 0, "%s: error %d getting rflags", __func__, error);
1325-
13261311
error = vie_read_register(vcpu, CPU_REG_RSP, &rsp);
1327-
ASSERT(error == 0, "%s: error %d getting rsp", __func__, error);
1312+
13281313
if (pushop != 0) {
13291314
rsp -= size;
13301315
}
@@ -1379,7 +1364,6 @@ emulate_stack_op(struct vcpu *vcpu, uint64_t mmio_gpa, struct vie *vie,
13791364
if (error == 0) {
13801365
error = vie_update_register(vcpu, CPU_REG_RSP, rsp,
13811366
stackaddrsize);
1382-
ASSERT(error == 0, "error %d updating rsp", error);
13831367
}
13841368
return error;
13851369
}
@@ -1478,7 +1462,6 @@ emulate_bittest(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
14781462
}
14791463

14801464
error = vie_read_register(vcpu, CPU_REG_RFLAGS, &rflags);
1481-
ASSERT(error == 0, "%s: error %d getting rflags", __func__, error);
14821465

14831466
error = memread(vcpu, gpa, &val, vie->opsize, memarg);
14841467
if (error != 0) {
@@ -1500,7 +1483,6 @@ emulate_bittest(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
15001483
}
15011484
size = 8U;
15021485
error = vie_update_register(vcpu, CPU_REG_RFLAGS, rflags, size);
1503-
ASSERT(error == 0, "%s: error %d updating rflags", __func__, error);
15041486

15051487
return 0;
15061488
}

0 commit comments

Comments
 (0)