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jsun26intelwenlingz
jsun26intel
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HV: move DRHD data to platform acpi info
In current code, the DRHD data is hardcoded in sbl.c. Replace the data with MACROs which defined in platform_acpi_info.h as it could be parsed by offline tool. Tracked-On: #1500 Signed-off-by: Victor Sun <victor.sun@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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-25
lines changed

2 files changed

+170
-25
lines changed

‎hypervisor/bsp/include/sbl/platform_acpi_info.h

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,4 +55,63 @@
5555
#define WAKE_VECTOR_32 0x7A86BBDCUL
5656
#define WAKE_VECTOR_64 0x7A86BBE8UL
5757

58+
/* DRHD of DMAR */
59+
#define DRHD_COUNT 2U
60+
61+
#define DRHD0_DEV_CNT 1U
62+
#define DRHD0_SEGMENT 0U
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#define DRHD0_FLAGS 0U
64+
#define DRHD0_REG_BASE 0xFED64000UL
65+
#define DRHD0_IGNORE true
66+
#define DRHD0_DEVSCOPE0_BUS 0U
67+
#define DRHD0_DEVSCOPE0_PATH DEVFUN(0x2U, 0U)
68+
#define DRHD0_DEVSCOPE1_BUS 0U
69+
#define DRHD0_DEVSCOPE1_PATH 0U
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#define DRHD0_DEVSCOPE2_BUS 0U
71+
#define DRHD0_DEVSCOPE2_PATH 0U
72+
#define DRHD0_DEVSCOPE3_BUS 0U
73+
#define DRHD0_DEVSCOPE3_PATH 0U
74+
75+
#define DRHD1_DEV_CNT 0U
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#define DRHD1_SEGMENT 0U
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#define DRHD1_FLAGS DRHD_FLAG_INCLUDE_PCI_ALL_MASK
78+
#define DRHD1_REG_BASE 0xFED65000UL
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#define DRHD1_IGNORE false
80+
#define DRHD1_DEVSCOPE0_BUS 0U
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#define DRHD1_DEVSCOPE0_PATH 0U
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#define DRHD1_DEVSCOPE1_BUS 0U
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#define DRHD1_DEVSCOPE1_PATH 0U
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#define DRHD1_DEVSCOPE2_BUS 0U
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#define DRHD1_DEVSCOPE2_PATH 0U
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#define DRHD1_DEVSCOPE3_BUS 0U
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#define DRHD1_DEVSCOPE3_PATH 0U
88+
89+
#define DRHD2_DEV_CNT 0U
90+
#define DRHD2_SEGMENT 0U
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#define DRHD2_FLAGS 0U
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#define DRHD2_REG_BASE 0U
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#define DRHD2_IGNORE false
94+
#define DRHD2_DEVSCOPE0_BUS 0U
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#define DRHD2_DEVSCOPE0_PATH 0U
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#define DRHD2_DEVSCOPE1_BUS 0U
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#define DRHD2_DEVSCOPE1_PATH 0U
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#define DRHD2_DEVSCOPE2_BUS 0U
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#define DRHD2_DEVSCOPE2_PATH 0U
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#define DRHD2_DEVSCOPE3_BUS 0U
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#define DRHD2_DEVSCOPE3_PATH 0U
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103+
#define DRHD3_DEV_CNT 0U
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#define DRHD3_SEGMENT 0U
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#define DRHD3_FLAGS 0U
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#define DRHD3_REG_BASE 0U
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#define DRHD3_IGNORE false
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#define DRHD3_DEVSCOPE0_BUS 0U
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#define DRHD3_DEVSCOPE0_PATH 0U
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#define DRHD3_DEVSCOPE1_BUS 0U
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#define DRHD3_DEVSCOPE1_PATH 0U
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#define DRHD3_DEVSCOPE2_BUS 0U
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#define DRHD3_DEVSCOPE2_PATH 0U
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#define DRHD3_DEVSCOPE3_BUS 0U
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#define DRHD3_DEVSCOPE3_PATH 0U
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58117
#endif /* PLATFORM_ACPI_INFO_H */

‎hypervisor/bsp/sbl/sbl.c

Lines changed: 111 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -7,37 +7,123 @@
77
#include <hypervisor.h>
88

99
#ifndef CONFIG_DMAR_PARSE_ENABLED
10-
static struct dmar_dev_scope default_drhd_unit_dev_scope0[] = {
11-
{ .bus = 0U, .devfun = DEVFUN(0x2U, 0U), },
10+
11+
#define MAX_DRHDS 4
12+
#define MAX_DRHD_DEVSCOPES 4
13+
14+
static struct dmar_dev_scope drhd0_dev_scope[MAX_DRHD_DEVSCOPES] = {
15+
{
16+
.bus = DRHD0_DEVSCOPE0_BUS,
17+
.devfun = DRHD0_DEVSCOPE0_PATH
18+
},
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{
20+
.bus = DRHD0_DEVSCOPE1_BUS,
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.devfun = DRHD0_DEVSCOPE1_PATH
22+
},
23+
{
24+
.bus = DRHD0_DEVSCOPE2_BUS,
25+
.devfun = DRHD0_DEVSCOPE2_PATH
26+
},
27+
{
28+
.bus = DRHD0_DEVSCOPE3_BUS,
29+
.devfun = DRHD0_DEVSCOPE3_PATH
30+
}
31+
};
32+
33+
static struct dmar_dev_scope drhd1_dev_scope[MAX_DRHD_DEVSCOPES] = {
34+
{
35+
.bus = DRHD1_DEVSCOPE0_BUS,
36+
.devfun = DRHD1_DEVSCOPE0_PATH
37+
},
38+
{
39+
.bus = DRHD1_DEVSCOPE1_BUS,
40+
.devfun = DRHD1_DEVSCOPE1_PATH
41+
},
42+
{
43+
.bus = DRHD1_DEVSCOPE2_BUS,
44+
.devfun = DRHD1_DEVSCOPE2_PATH
45+
},
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{
47+
.bus = DRHD1_DEVSCOPE3_BUS,
48+
.devfun = DRHD1_DEVSCOPE3_PATH
49+
}
50+
};
51+
52+
static struct dmar_dev_scope drhd2_dev_scope[MAX_DRHD_DEVSCOPES] = {
53+
{
54+
.bus = DRHD2_DEVSCOPE0_BUS,
55+
.devfun = DRHD2_DEVSCOPE0_PATH
56+
},
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{
58+
.bus = DRHD2_DEVSCOPE1_BUS,
59+
.devfun = DRHD2_DEVSCOPE1_PATH
60+
},
61+
{
62+
.bus = DRHD2_DEVSCOPE2_BUS,
63+
.devfun = DRHD2_DEVSCOPE2_PATH
64+
},
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{
66+
.bus = DRHD2_DEVSCOPE3_BUS,
67+
.devfun = DRHD2_DEVSCOPE3_PATH
68+
}
1269
};
1370

14-
static struct dmar_drhd drhd_info_array[] = {
15-
{
16-
.dev_cnt = 1U,
17-
.segment = 0U,
18-
.flags = 0U,
19-
.reg_base_addr = 0xFED64000UL,
20-
/* Ignore the iommu for intel graphic device since GVT-g needs
21-
* vtd disabled for gpu
22-
*/
23-
.ignore = true,
24-
.devices = default_drhd_unit_dev_scope0,
25-
},
26-
{
27-
/* No need to specify devices since
28-
* DRHD_FLAG_INCLUDE_PCI_ALL_MASK set
29-
*/
30-
.dev_cnt = 0U,
31-
.segment = 0U,
32-
.flags = DRHD_FLAG_INCLUDE_PCI_ALL_MASK,
33-
.reg_base_addr = 0xFED65000UL,
34-
.ignore = false,
35-
.devices = NULL,
71+
static struct dmar_dev_scope drhd3_dev_scope[MAX_DRHD_DEVSCOPES] = {
72+
{
73+
.bus = DRHD3_DEVSCOPE0_BUS,
74+
.devfun = DRHD3_DEVSCOPE0_PATH
75+
},
76+
{
77+
.bus = DRHD3_DEVSCOPE1_BUS,
78+
.devfun = DRHD3_DEVSCOPE1_PATH
79+
},
80+
{
81+
.bus = DRHD3_DEVSCOPE2_BUS,
82+
.devfun = DRHD3_DEVSCOPE2_PATH
3683
},
84+
{
85+
.bus = DRHD3_DEVSCOPE3_BUS,
86+
.devfun = DRHD3_DEVSCOPE3_PATH
87+
}
88+
};
89+
90+
static struct dmar_drhd drhd_info_array[MAX_DRHDS] = {
91+
{
92+
.dev_cnt = DRHD0_DEV_CNT,
93+
.segment = DRHD0_SEGMENT,
94+
.flags = DRHD0_FLAGS,
95+
.reg_base_addr = DRHD0_REG_BASE,
96+
.ignore = DRHD0_IGNORE,
97+
.devices = drhd0_dev_scope
98+
},
99+
{
100+
.dev_cnt = DRHD1_DEV_CNT,
101+
.segment = DRHD1_SEGMENT,
102+
.flags = DRHD1_FLAGS,
103+
.reg_base_addr = DRHD1_REG_BASE,
104+
.ignore = DRHD1_IGNORE,
105+
.devices = drhd1_dev_scope
106+
},
107+
{
108+
.dev_cnt = DRHD2_DEV_CNT,
109+
.segment = DRHD2_SEGMENT,
110+
.flags = DRHD2_FLAGS,
111+
.reg_base_addr = DRHD2_REG_BASE,
112+
.ignore = DRHD2_IGNORE,
113+
.devices = drhd2_dev_scope
114+
},
115+
{
116+
.dev_cnt = DRHD3_DEV_CNT,
117+
.segment = DRHD3_SEGMENT,
118+
.flags = DRHD3_FLAGS,
119+
.reg_base_addr = DRHD3_REG_BASE,
120+
.ignore = DRHD3_IGNORE,
121+
.devices = drhd3_dev_scope
122+
}
37123
};
38124

39125
static struct dmar_info sbl_dmar_info = {
40-
.drhd_count = 2,
126+
.drhd_count = DRHD_COUNT,
41127
.drhd_units = drhd_info_array,
42128
};
43129

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