Skip to content

Commit 4106fad

Browse files
shiqingglijinxia
authored andcommitted
hv: treewide: fix 'Switch empty default has no comment'
This patch add some comments after the default and before the break in the switch statement based on MISRA-C requirement. Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
1 parent af7943c commit 4106fad

File tree

8 files changed

+97
-0
lines changed

8 files changed

+97
-0
lines changed

hypervisor/arch/x86/assign.c

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -525,6 +525,11 @@ static void ptdev_intr_handle_irq(struct vm *vm,
525525
break;
526526
}
527527
default:
528+
/*
529+
* In this switch statement, intx->vpin_src shall either be
530+
* PTDEV_VPIN_IOAPIC or PTDEV_VPIN_PIC.
531+
* Gracefully return if prior case clauses have not been met.
532+
*/
528533
break;
529534
}
530535
}
@@ -598,6 +603,12 @@ void ptdev_intx_ack(struct vm *vm, uint8_t virt_pin,
598603
case PTDEV_VPIN_PIC:
599604
vpic_deassert_irq(vm, virt_pin);
600605
default:
606+
/*
607+
* In this switch statement,
608+
* entry->ptdev_intr_info.intx.vpin_src shall either be
609+
* PTDEV_VPIN_IOAPIC or PTDEV_VPIN_PIC.
610+
* Gracefully return if prior case clauses have not been met.
611+
*/
601612
break;
602613
}
603614

hypervisor/arch/x86/cpuid.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -369,6 +369,12 @@ void guest_cpuid(struct vcpu *vcpu,
369369
break;
370370

371371
default:
372+
/*
373+
* In this switch statement, leaf shall either be 0x01U or 0x0bU
374+
* or 0x0dU. All the other cases have been handled properly
375+
* before this switch statement.
376+
* Gracefully return if prior case clauses have not been met.
377+
*/
372378
break;
373379
}
374380
}

hypervisor/arch/x86/guest/instr_emul.c

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -827,6 +827,12 @@ static int emulate_mov(struct vcpu *vcpu, struct instr_emul_vie *vie)
827827
error = mmio_write(vcpu, val);
828828
break;
829829
default:
830+
/*
831+
* For the opcode that is not handled (an invalid opcode), the
832+
* error code is assigned to a default value (-EINVAL).
833+
* Gracefully return this error code if prior case clauses have
834+
* not been met.
835+
*/
830836
break;
831837
}
832838

@@ -915,6 +921,12 @@ static int emulate_movx(struct vcpu *vcpu, struct instr_emul_vie *vie)
915921
vie_update_register(vcpu, reg, val, size);
916922
break;
917923
default:
924+
/*
925+
* For the opcode that is not handled (an invalid opcode), the
926+
* error code is assigned to a default value (-EINVAL).
927+
* Gracefully return this error code if prior case clauses have
928+
* not been met.
929+
*/
918930
break;
919931
}
920932
return error;
@@ -1150,6 +1162,12 @@ static int emulate_test(struct vcpu *vcpu, struct instr_emul_vie *vie)
11501162
result = val1 & val2;
11511163
break;
11521164
default:
1165+
/*
1166+
* For the opcode that is not handled (an invalid opcode), the
1167+
* error code is assigned to a default value (-EINVAL).
1168+
* Gracefully return this error code if prior case clauses have
1169+
* not been met.
1170+
*/
11531171
break;
11541172
}
11551173

@@ -1232,6 +1250,12 @@ static int emulate_and(struct vcpu *vcpu, struct instr_emul_vie *vie)
12321250
error = mmio_write(vcpu, result);
12331251
break;
12341252
default:
1253+
/*
1254+
* For the opcode that is not handled (an invalid opcode), the
1255+
* error code is assigned to a default value (-EINVAL).
1256+
* Gracefully return this error code if prior case clauses have
1257+
* not been met.
1258+
*/
12351259
break;
12361260
}
12371261

@@ -1318,6 +1342,12 @@ static int emulate_or(struct vcpu *vcpu, struct instr_emul_vie *vie)
13181342
error = mmio_write(vcpu, result);
13191343
break;
13201344
default:
1345+
/*
1346+
* For the opcode that is not handled (an invalid opcode), the
1347+
* error code is assigned to a default value (-EINVAL).
1348+
* Gracefully return this error code if prior case clauses have
1349+
* not been met.
1350+
*/
13211351
break;
13221352
}
13231353
if (error == 0) {
@@ -1462,6 +1492,12 @@ static int emulate_sub(struct vcpu *vcpu, struct instr_emul_vie *vie)
14621492
vie_update_register(vcpu, reg, nval, size);
14631493
break;
14641494
default:
1495+
/*
1496+
* For the opcode that is not handled (an invalid opcode), the
1497+
* error code is assigned to a default value (-EINVAL).
1498+
* Gracefully return this error code if prior case clauses have
1499+
* not been met.
1500+
*/
14651501
break;
14661502
}
14671503

hypervisor/arch/x86/guest/vioapic.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -254,6 +254,12 @@ vioapic_indirect_read(struct vioapic *vioapic, uint32_t addr)
254254
case IOAPIC_ARB:
255255
return vioapic->id;
256256
default:
257+
/*
258+
* In this switch statement, regnum shall either be IOAPIC_ID or
259+
* IOAPIC_VER or IOAPIC_ARB.
260+
* All the other cases will be handled properly later after this
261+
* switch statement.
262+
*/
257263
break;
258264
}
259265

@@ -294,6 +300,12 @@ vioapic_indirect_write(struct vioapic *vioapic, uint32_t addr, uint32_t data)
294300
/* readonly */
295301
break;
296302
default:
303+
/*
304+
* In this switch statement, regnum shall either be IOAPIC_ID or
305+
* IOAPIC_VER or IOAPIC_ARB.
306+
* All the other cases will be handled properly later after this
307+
* switch statement.
308+
*/
297309
break;
298310
}
299311

hypervisor/arch/x86/guest/vlapic.c

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -531,6 +531,12 @@ lvt_off_to_idx(uint32_t offset)
531531
index = APIC_LVT_ERROR;
532532
break;
533533
default:
534+
/*
535+
* For the offset that is not handled (an invalid offset of
536+
* Local Vector Table), its index is assigned to a default
537+
* value, which indicates an invalid index.
538+
* The index will be checked later to guarantee the validity.
539+
*/
534540
break;
535541
}
536542
ASSERT(index <= VLAPIC_MAXLVT_INDEX,
@@ -867,6 +873,11 @@ vlapic_trigger_lvt(struct acrn_vlapic *vlapic, uint32_t vector)
867873
vcpu_inject_nmi(vcpu);
868874
break;
869875
default:
876+
/*
877+
* Only LINT[1:0] pins will be handled here.
878+
* Gracefully return if prior case clauses have not
879+
* been met.
880+
*/
870881
break;
871882
}
872883
return 0;

hypervisor/common/hypercall.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,11 @@ handle_vpic_irqline(struct vm *vm, uint32_t irq, enum irq_mode mode)
8787
case IRQ_PULSE:
8888
ret = vpic_pulse_irq(vm, irq);
8989
default:
90+
/*
91+
* In this switch statement, mode shall either be IRQ_ASSERT or
92+
* IRQ_DEASSERT or IRQ_PULSE.
93+
* Gracefully return if prior case clauses have not been met.
94+
*/
9095
break;
9196
}
9297

@@ -113,6 +118,11 @@ handle_vioapic_irqline(struct vm *vm, uint32_t irq, enum irq_mode mode)
113118
ret = vioapic_pulse_irq(vm, irq);
114119
break;
115120
default:
121+
/*
122+
* In this switch statement, mode shall either be IRQ_ASSERT or
123+
* IRQ_DEASSERT or IRQ_PULSE.
124+
* Gracefully return if prior case clauses have not been met.
125+
*/
116126
break;
117127
}
118128
return ret;

hypervisor/debug/shell.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -194,6 +194,12 @@ static void shell_handle_special_char(uint8_t ch)
194194
(void) shell_getc();
195195
break;
196196
default:
197+
/*
198+
* Only the Escape character is treated as special character.
199+
* All the other characters have been handled properly in
200+
* shell_input_line, so they will not be handled in this API.
201+
* Gracefully return if prior case clauses have not been met.
202+
*/
197203
break;
198204
}
199205
}

hypervisor/debug/vuart.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -205,6 +205,11 @@ static void vuart_write(__unused struct vm_io_handler *hdlr,
205205
vu->scr = value;
206206
break;
207207
default:
208+
/*
209+
* For the offset that is not handled (either a read-only
210+
* register or an invalid register), ignore the write to it.
211+
* Gracefully return if prior case clauses have not been met.
212+
*/
208213
break;
209214
}
210215

0 commit comments

Comments
 (0)