HV:treewide:Add exec_vmread32 and exec_vmwrite32 functions

In the hypervisor, VMCS fields include 16-bit fields,
32-bit fields, 64-bit fields and natural-width fields.
In the current implement, no exec_vmread32/exec_vmwrite32
is for accessing 32-bit fields. So there are many type
casting for the return value and parameters vmread/vmwrite
operations.

Create exec_vmread32 and exec_vmwrite32 functions to
access 32-bit fields in VMCS;
Update related variables type for vmread/vmwrite operations;
Update related caller according to VMCS fields size.

V1--V2:
        This is new part of this patch serial to only
        update 32 bit vmread/vmread opertions and related
        caller.
V2-->V3:
	Update related variables type in data structure
	 for exec_vmread32/exec_vmwrite32.
	Rename temp variable 'low' into 'value' for
	exec_vmread32;
V3-->V4:
	Remove useless type conversion.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>

Author: wuxyintel

hypervisor/arch/x86/guest/instr_emul_wrapper.c

@@ -110,8 +110,8 @@ int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
 	}
 
 	exec_vmwrite(base, ret_desc->base);
-	exec_vmwrite(limit, ret_desc->limit);
-	exec_vmwrite(access, ret_desc->access);
+	exec_vmwrite32(limit, ret_desc->limit);
+	exec_vmwrite32(access, ret_desc->access);
 
 	return 0;
 }
@@ -136,8 +136,8 @@ int vm_get_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
 	}
 
 	desc->base = exec_vmread(base);
-	desc->limit = (uint32_t)exec_vmread(limit);
-	desc->access = (uint32_t)exec_vmread(access);
+	desc->limit = exec_vmread32(limit);
+	desc->access = exec_vmread32(access);
 
 	return 0;
 }
@@ -351,7 +351,7 @@ int decode_instruction(struct vcpu *vcpu)
 		return retval;
 	}
 
-	csar = (uint32_t)exec_vmread(VMX_GUEST_CS_ATTR);
+	csar = exec_vmread32(VMX_GUEST_CS_ATTR);
 	get_guest_paging_info(vcpu, emul_ctxt, csar);
 	cpu_mode = get_vcpu_mode(vcpu);
 

hypervisor/arch/x86/guest/vcpu.c

@@ -205,24 +205,24 @@ int start_vcpu(struct vcpu *vcpu)
 
 	/* Save guest IA32_EFER register */
 	cur_context->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
-	set_vcpu_mode(vcpu, exec_vmread(VMX_GUEST_CS_ATTR));
+	set_vcpu_mode(vcpu, exec_vmread32(VMX_GUEST_CS_ATTR));
 
 	/* Obtain current VCPU instruction pointer and length */
 	cur_context->rip = exec_vmread(VMX_GUEST_RIP);
-	vcpu->arch_vcpu.inst_len = exec_vmread(VMX_EXIT_INSTR_LEN);
+	vcpu->arch_vcpu.inst_len = exec_vmread32(VMX_EXIT_INSTR_LEN);
 
 	cur_context->rsp = exec_vmread(VMX_GUEST_RSP);
 	cur_context->rflags = exec_vmread(VMX_GUEST_RFLAGS);
 
 	/* Obtain VM exit reason */
-	vcpu->arch_vcpu.exit_reason = exec_vmread(VMX_EXIT_REASON);
+	vcpu->arch_vcpu.exit_reason = exec_vmread32(VMX_EXIT_REASON);
 
 	if (status != 0) {
 		/* refer to 64-ia32 spec section 24.9.1 volume#3 */
 		if (vcpu->arch_vcpu.exit_reason & VMX_VMENTRY_FAIL)
 			pr_fatal("vmentry fail reason=%lx", vcpu->arch_vcpu.exit_reason);
 		else
-			pr_fatal("vmexit fail err_inst=%lx", exec_vmread(VMX_INSTR_ERROR));
+			pr_fatal("vmexit fail err_inst=%x", exec_vmread32(VMX_INSTR_ERROR));
 
 		ASSERT(status == 0, "vm fail");
 	}

hypervisor/arch/x86/guest/vmsr.c

@@ -198,7 +198,7 @@ int rdmsr_vmexit_handler(struct vcpu *vcpu)
 	/* following MSR not emulated now just left for future */
 	case MSR_IA32_SYSENTER_CS:
 	{
-		v = exec_vmread(VMX_GUEST_IA32_SYSENTER_CS);
+		v = (uint64_t)exec_vmread32(VMX_GUEST_IA32_SYSENTER_CS);
 		break;
 	}
 	case MSR_IA32_SYSENTER_ESP:
@@ -331,7 +331,7 @@ int wrmsr_vmexit_handler(struct vcpu *vcpu)
 	/* following MSR not emulated now just left for future */
 	case MSR_IA32_SYSENTER_CS:
 	{
-		exec_vmwrite(VMX_GUEST_IA32_SYSENTER_CS, v);
+		exec_vmwrite32(VMX_GUEST_IA32_SYSENTER_CS, (uint32_t)v);
 		break;
 	}
 	case MSR_IA32_SYSENTER_ESP:

hypervisor/arch/x86/trusty.c

@@ -38,16 +38,16 @@ static struct key_info g_key_info = {
 { \
 	seg.selector = exec_vmread16(VMX_GUEST_##SEG_NAME##_SEL); \
 	seg.base = exec_vmread(VMX_GUEST_##SEG_NAME##_BASE); \
-	seg.limit = exec_vmread(VMX_GUEST_##SEG_NAME##_LIMIT); \
-	seg.attr = exec_vmread(VMX_GUEST_##SEG_NAME##_ATTR); \
+	seg.limit = exec_vmread32(VMX_GUEST_##SEG_NAME##_LIMIT); \
+	seg.attr = exec_vmread32(VMX_GUEST_##SEG_NAME##_ATTR); \
 }
 
 #define load_segment(seg, SEG_NAME) \
 { \
 	exec_vmwrite16(VMX_GUEST_##SEG_NAME##_SEL, seg.selector); \
 	exec_vmwrite(VMX_GUEST_##SEG_NAME##_BASE, seg.base); \
-	exec_vmwrite(VMX_GUEST_##SEG_NAME##_LIMIT, seg.limit); \
-	exec_vmwrite(VMX_GUEST_##SEG_NAME##_ATTR, seg.attr); \
+	exec_vmwrite32(VMX_GUEST_##SEG_NAME##_LIMIT, seg.limit); \
+	exec_vmwrite32(VMX_GUEST_##SEG_NAME##_ATTR, seg.attr); \
 }
 
 #ifndef WORKAROUND_FOR_TRUSTY_4G_MEM
@@ -234,9 +234,9 @@ static void save_world_ctx(struct run_context *context)
 	 */
 	context->vmx_ia32_pat = exec_vmread(VMX_GUEST_IA32_PAT_FULL);
 	context->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
-	context->ia32_sysenter_cs = exec_vmread(VMX_GUEST_IA32_SYSENTER_CS);
 	context->ia32_sysenter_esp = exec_vmread(VMX_GUEST_IA32_SYSENTER_ESP);
 	context->ia32_sysenter_eip = exec_vmread(VMX_GUEST_IA32_SYSENTER_EIP);
+	context->ia32_sysenter_cs = exec_vmread32(VMX_GUEST_IA32_SYSENTER_CS);
 	save_segment(context->cs, CS);
 	save_segment(context->ss, SS);
 	save_segment(context->ds, DS);
@@ -247,9 +247,9 @@ static void save_world_ctx(struct run_context *context)
 	save_segment(context->ldtr, LDTR);
 	/* Only base and limit for IDTR and GDTR */
 	context->idtr.base = exec_vmread(VMX_GUEST_IDTR_BASE);
-	context->idtr.limit = exec_vmread(VMX_GUEST_IDTR_LIMIT);
 	context->gdtr.base = exec_vmread(VMX_GUEST_GDTR_BASE);
-	context->gdtr.limit = exec_vmread(VMX_GUEST_GDTR_LIMIT);
+	context->idtr.limit = exec_vmread32(VMX_GUEST_IDTR_LIMIT);
+	context->gdtr.limit = exec_vmread32(VMX_GUEST_GDTR_LIMIT);
 
 	/* MSRs which not in the VMCS */
 	context->ia32_star = msr_read(MSR_IA32_STAR);
@@ -280,7 +280,7 @@ static void load_world_ctx(struct run_context *context)
 	exec_vmwrite64(VMX_GUEST_IA32_DEBUGCTL_FULL, context->ia32_debugctl);
 	exec_vmwrite64(VMX_GUEST_IA32_PAT_FULL, context->vmx_ia32_pat);
 	exec_vmwrite64(VMX_GUEST_IA32_EFER_FULL, context->ia32_efer);
-	exec_vmwrite(VMX_GUEST_IA32_SYSENTER_CS, context->ia32_sysenter_cs);
+	exec_vmwrite32(VMX_GUEST_IA32_SYSENTER_CS, context->ia32_sysenter_cs);
 	exec_vmwrite(VMX_GUEST_IA32_SYSENTER_ESP, context->ia32_sysenter_esp);
 	exec_vmwrite(VMX_GUEST_IA32_SYSENTER_EIP, context->ia32_sysenter_eip);
 	load_segment(context->cs, CS);
@@ -293,9 +293,9 @@ static void load_world_ctx(struct run_context *context)
 	load_segment(context->ldtr, LDTR);
 	/* Only base and limit for IDTR and GDTR */
 	exec_vmwrite(VMX_GUEST_IDTR_BASE, context->idtr.base);
-	exec_vmwrite(VMX_GUEST_IDTR_LIMIT, context->idtr.limit);
 	exec_vmwrite(VMX_GUEST_GDTR_BASE, context->gdtr.base);
-	exec_vmwrite(VMX_GUEST_GDTR_LIMIT, context->gdtr.limit);
+	exec_vmwrite32(VMX_GUEST_IDTR_LIMIT, context->idtr.limit);
+	exec_vmwrite32(VMX_GUEST_GDTR_LIMIT, context->gdtr.limit);
 
 	/* MSRs which not in the VMCS */
 	msr_write(MSR_IA32_STAR, context->ia32_star);

hypervisor/arch/x86/virq.c

@@ -63,7 +63,7 @@ static int is_guest_irq_enabled(struct vcpu *vcpu)
 	if ((guest_rflags & HV_ARCH_VCPU_RFLAGS_IF) != 0UL) {
 		/* Interrupts are allowed */
 		/* Check for temporarily disabled interrupts */
-		guest_state = exec_vmread(VMX_GUEST_INTERRUPTIBILITY_INFO);
+		guest_state = exec_vmread32(VMX_GUEST_INTERRUPTIBILITY_INFO);
 
 		if ((guest_state & (HV_ARCH_VCPU_BLOCKED_BY_STI |
 				    HV_ARCH_VCPU_BLOCKED_BY_MOVSS)) == 0UL) {
@@ -139,7 +139,7 @@ static int vcpu_do_pending_event(struct vcpu *vcpu)
 		return -1;
 	}
 
-	exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD, VMX_INT_INFO_VALID |
+	exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, VMX_INT_INFO_VALID |
 		(vector & 0xFFU));
 
 	vlapic_intr_accepted(vlapic, vector);
@@ -163,7 +163,7 @@ static int vcpu_do_pending_extint(struct vcpu *vcpu)
 		if (vector <= NR_MAX_VECTOR) {
 			dev_dbg(ACRN_DBG_INTR, "VPIC: to inject PIC vector %d\n",
 					vector & 0xFFU);
-			exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD,
+			exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
 					VMX_INT_INFO_VALID |
 					(vector & 0xFFU));
 			vpic_intr_accepted(vcpu->vm, vector);
@@ -245,12 +245,12 @@ int vcpu_queue_exception(struct vcpu *vcpu, uint32_t vector,
 static void _vcpu_inject_exception(struct vcpu *vcpu, uint32_t vector)
 {
 	if ((exception_type[vector] & EXCEPTION_ERROR_CODE_VALID) != 0U) {
-		exec_vmwrite(VMX_ENTRY_EXCEPTION_ERROR_CODE,
+		exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE,
 				vcpu->arch_vcpu.exception_info.error);
 	}
 
-	exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD, VMX_INT_INFO_VALID |
-			(exception_type[vector] << 8) | (vector & 0xFFU));
+	exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, VMX_INT_INFO_VALID |
+			(exception_type[vector] << 8U) | (vector & 0xFFU));
 
 	vcpu->arch_vcpu.exception_info.exception = VECTOR_INVALID;
 }
@@ -324,9 +324,9 @@ int interrupt_window_vmexit_handler(struct vcpu *vcpu)
 		 * Disable the interrupt window exiting
 		 */
 		vcpu->arch_vcpu.irq_window_enabled = 0U;
-		value32 = exec_vmread(VMX_PROC_VM_EXEC_CONTROLS);
+		value32 = exec_vmread32(VMX_PROC_VM_EXEC_CONTROLS);
 		value32 &= ~(VMX_PROCBASED_CTLS_IRQ_WIN);
-		exec_vmwrite(VMX_PROC_VM_EXEC_CONTROLS, value32);
+		exec_vmwrite32(VMX_PROC_VM_EXEC_CONTROLS, value32);
 	}
 
 	vcpu_retain_rip(vcpu);
@@ -338,7 +338,7 @@ int external_interrupt_vmexit_handler(struct vcpu *vcpu)
 	uint32_t intr_info;
 	struct intr_excp_ctx ctx;
 
-	intr_info = exec_vmread(VMX_EXIT_INT_INFO);
+	intr_info = exec_vmread32(VMX_EXIT_INT_INFO);
 	if (((intr_info & VMX_INT_INFO_VALID) == 0U) ||
 		(((intr_info & VMX_INT_TYPE_MASK) >> 8)
 		!= VMX_INT_TYPE_EXT_INT)) {
@@ -383,10 +383,10 @@ int acrn_handle_pending_request(struct vcpu *vcpu)
 	if (vcpu->arch_vcpu.inject_event_pending) {
 		if ((vcpu->arch_vcpu.inject_info.intr_info &
 			(EXCEPTION_ERROR_CODE_VALID << 8)) != 0U)
-			exec_vmwrite(VMX_ENTRY_EXCEPTION_ERROR_CODE,
+			exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE,
 				vcpu->arch_vcpu.inject_info.error_code);
 
-		exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD,
+		exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
 			vcpu->arch_vcpu.inject_info.intr_info);
 
 		vcpu->arch_vcpu.inject_event_pending = false;
@@ -401,8 +401,8 @@ int acrn_handle_pending_request(struct vcpu *vcpu)
 	/* inject NMI before maskable hardware interrupt */
 	if (bitmap_test_and_clear(ACRN_REQUEST_NMI, pending_req_bits)) {
 		/* Inject NMI vector = 2 */
-		exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD,
-			VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8) | IDT_NMI);
+		exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
+			VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
 
 		goto INTR_WIN;
 	}
@@ -415,7 +415,7 @@ int acrn_handle_pending_request(struct vcpu *vcpu)
 	 *   at next vm exit?
 	 */
 	if ((vcpu->arch_vcpu.idt_vectoring_info & VMX_INT_INFO_VALID) != 0U) {
-		exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD,
+		exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
 				vcpu->arch_vcpu.idt_vectoring_info);
 		goto INTR_WIN;
 	}
@@ -450,9 +450,9 @@ int acrn_handle_pending_request(struct vcpu *vcpu)
 	/* Enable interrupt window exiting if pending */
 	if (intr_pending && vcpu->arch_vcpu.irq_window_enabled == 0U) {
 		vcpu->arch_vcpu.irq_window_enabled = 1U;
-		tmp = exec_vmread(VMX_PROC_VM_EXEC_CONTROLS);
+		tmp = exec_vmread32(VMX_PROC_VM_EXEC_CONTROLS);
 		tmp |= (VMX_PROCBASED_CTLS_IRQ_WIN);
-		exec_vmwrite(VMX_PROC_VM_EXEC_CONTROLS, tmp);
+		exec_vmwrite32(VMX_PROC_VM_EXEC_CONTROLS, tmp);
 	}
 
 	return ret;
@@ -462,7 +462,7 @@ void cancel_event_injection(struct vcpu *vcpu)
 {
 	uint32_t intinfo;
 
-	intinfo = exec_vmread(VMX_ENTRY_INT_INFO_FIELD);
+	intinfo = exec_vmread32(VMX_ENTRY_INT_INFO_FIELD);
 
 	/*
 	 * If event is injected, we clear VMX_ENTRY_INT_INFO_FIELD,
@@ -475,10 +475,10 @@ void cancel_event_injection(struct vcpu *vcpu)
 
 		if ((intinfo & (EXCEPTION_ERROR_CODE_VALID << 8)) != 0U)
 			vcpu->arch_vcpu.inject_info.error_code =
-				exec_vmread(VMX_ENTRY_EXCEPTION_ERROR_CODE);
+				exec_vmread32(VMX_ENTRY_EXCEPTION_ERROR_CODE);
 
 		vcpu->arch_vcpu.inject_info.intr_info = intinfo;
-		exec_vmwrite(VMX_ENTRY_INT_INFO_FIELD, 0UL);
+		exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, 0UL);
 	}
 }
 
@@ -500,21 +500,21 @@ int exception_vmexit_handler(struct vcpu *vcpu)
 	pr_dbg(" Handling guest exception");
 
 	/* Obtain VM-Exit information field pg 2912 */
-	intinfo = exec_vmread(VMX_EXIT_INT_INFO);
+	intinfo = exec_vmread32(VMX_EXIT_INT_INFO);
 	if ((intinfo & VMX_INT_INFO_VALID) != 0U) {
 		exception_vector = intinfo & 0xFFU;
 		/* Check if exception caused by the guest is a HW exception.
 		 * If the exit occurred due to a HW exception obtain the
 		 * error code to be conveyed to get via the stack
 		 */
 		if ((intinfo & VMX_INT_INFO_ERR_CODE_VALID) != 0U) {
-			int_err_code = exec_vmread(VMX_EXIT_INT_ERROR_CODE);
+			int_err_code = exec_vmread32(VMX_EXIT_INT_ERROR_CODE);
 
 			/* get current privilege level and fault address */
-			cpl = exec_vmread(VMX_GUEST_CS_ATTR);
-			cpl = (cpl >> 5) & 3U;
+			cpl = exec_vmread32(VMX_GUEST_CS_ATTR);
+			cpl = (cpl >> 5U) & 3U;
 
-			if (cpl < 3)
+			if (cpl < 3U)
 				int_err_code &= ~4U;
 			else
 				int_err_code |= 4U;

hypervisor/arch/x86/vmexit.c

@@ -141,7 +141,7 @@ int vmexit_handler(struct vcpu *vcpu)
 
 	/* Obtain interrupt info */
 	vcpu->arch_vcpu.idt_vectoring_info =
-	    exec_vmread(VMX_IDT_VEC_INFO_FIELD);
+	    exec_vmread32(VMX_IDT_VEC_INFO_FIELD);
 	/* Filter out HW exception & NMI */
 	if ((vcpu->arch_vcpu.idt_vectoring_info & VMX_INT_INFO_VALID) != 0U) {
 		uint32_t vector_info = vcpu->arch_vcpu.idt_vectoring_info;
@@ -151,7 +151,7 @@ int vmexit_handler(struct vcpu *vcpu)
 
 		if (type == VMX_INT_TYPE_HW_EXP) {
 			if ((vector_info & VMX_INT_INFO_ERR_CODE_VALID) != 0U)
-				err_code = exec_vmread(VMX_IDT_VEC_ERROR_CODE);
+				err_code = exec_vmread32(VMX_IDT_VEC_ERROR_CODE);
 			vcpu_queue_exception(vcpu, vector, err_code);
 			vcpu->arch_vcpu.idt_vectoring_info = 0U;
 		} else if (type == VMX_INT_TYPE_NMI) {