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lyan3wenlingz
lyan3
authored and
wenlingz
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hv: remove ACRN_REQUEST_TMR_UPDATE and unnecessary codes
Because ACRN_REQUEST_TMR_UPDATE is not needed anymore, this commit remove the MACRO definition and its related logic, including following functions: - apicv_batch_set_tmr() - vlapic_apicv_batch_set_tmr() - vlapic_set_tmr_one_vec() - vioapic_update_tmr() Tracked-On: #2343 Signed-off-by: Yan, Like <like.yan@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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6 files changed

+10
-130
lines changed

6 files changed

+10
-130
lines changed

‎hypervisor/arch/x86/guest/vlapic.c

Lines changed: 0 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -83,9 +83,6 @@ apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector);
8383
static int32_t
8484
apicv_pending_intr(const struct acrn_vlapic *vlapic);
8585

86-
static void
87-
apicv_batch_set_tmr(const struct acrn_vlapic *vlapic);
88-
8986
/*
9087
* Post an interrupt to the vcpu running on 'hostcpu'. This will use a
9188
* hardware assist if available (e.g. Posted Interrupt) or fall back to
@@ -1866,45 +1863,6 @@ vlapic_enabled(const struct acrn_vlapic *vlapic)
18661863
return ret;
18671864
}
18681865

1869-
/*
1870-
* APICv batch set tmr will try to set multi vec at the same time
1871-
* to avoid unnecessary VMCS read/update.
1872-
*/
1873-
void
1874-
vlapic_apicv_batch_set_tmr(struct acrn_vlapic *vlapic)
1875-
{
1876-
if (is_apicv_intr_delivery_supported()) {
1877-
apicv_batch_set_tmr(vlapic);
1878-
}
1879-
}
1880-
1881-
void
1882-
vlapic_set_tmr_one_vec(struct acrn_vlapic *vlapic, uint32_t delmode,
1883-
uint32_t vector, bool level)
1884-
{
1885-
ASSERT(vector <= NR_MAX_VECTOR,
1886-
"invalid vector %u", vector);
1887-
1888-
/*
1889-
* A level trigger is valid only for fixed and lowprio delivery modes.
1890-
*/
1891-
if ((delmode != APIC_DELMODE_FIXED) && (delmode != APIC_DELMODE_LOWPRIO)) {
1892-
dev_dbg(ACRN_DBG_LAPIC,
1893-
"Ignoring level trigger-mode for delivery-mode %u",
1894-
delmode);
1895-
} else {
1896-
/* NOTE
1897-
* We don't check whether the vcpu is in the dest here. That means
1898-
* all vcpus of vm will do tmr update.
1899-
*
1900-
* If there is new caller to this function, need to refine this
1901-
* part of work.
1902-
*/
1903-
dev_dbg(ACRN_DBG_LAPIC, "vector %u set to level-triggered", vector);
1904-
vlapic_set_tmr(vlapic, vector, level);
1905-
}
1906-
}
1907-
19081866
/*
19091867
* @pre vcpu != NULL
19101868
* @pre vector <= 255U
@@ -2312,31 +2270,6 @@ apicv_pending_intr(const struct acrn_vlapic *vlapic)
23122270
return ret;
23132271
}
23142272

2315-
/* Update the VMX_EOI_EXIT according to related tmr */
2316-
#define EOI_STEP_LEN (64U)
2317-
#define TMR_STEP_LEN (32U)
2318-
static void
2319-
apicv_batch_set_tmr(const struct acrn_vlapic *vlapic)
2320-
{
2321-
const struct lapic_regs *lapic = &(vlapic->apic_page);
2322-
uint64_t val;
2323-
const struct lapic_reg *ptr;
2324-
uint32_t s, e;
2325-
2326-
ptr = &lapic->tmr[0];
2327-
s = 0U;
2328-
e = 256U;
2329-
2330-
while (s < e) {
2331-
val = ptr[(s / TMR_STEP_LEN) + 1].v;
2332-
val <<= TMR_STEP_LEN;
2333-
val |= ptr[s / TMR_STEP_LEN].v;
2334-
exec_vmwrite64(vmx_eoi_exit(s), val);
2335-
2336-
s += EOI_STEP_LEN;
2337-
}
2338-
}
2339-
23402273
/**
23412274
*APIC-v: Get the HPA to APIC-access page
23422275
* **/

‎hypervisor/arch/x86/virq.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -405,10 +405,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
405405
flush_vpid_single(arch->vpid);
406406
}
407407

408-
if (bitmap_test_and_clear_lock(ACRN_REQUEST_TMR_UPDATE, pending_req_bits)) {
409-
vioapic_update_tmr(vcpu);
410-
}
411-
412408
if (bitmap_test_and_clear_lock(ACRN_REQUEST_EOI_EXIT_UPDATE, pending_req_bits)) {
413409
vcpu_set_vmcs_eoi_exit(vcpu);
414410
}

‎hypervisor/dm/vioapic.c

Lines changed: 0 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -231,44 +231,6 @@ vioapic_update_eoi_exit(const struct acrn_vioapic *vioapic)
231231
}
232232
}
233233

234-
/*
235-
* Reset the vlapic's trigger-mode register to reflect the ioapic pin
236-
* configuration.
237-
*/
238-
void
239-
vioapic_update_tmr(struct acrn_vcpu *vcpu)
240-
{
241-
struct acrn_vioapic *vioapic;
242-
struct acrn_vlapic *vlapic;
243-
union ioapic_rte rte;
244-
uint32_t vector, delmode;
245-
bool level;
246-
uint32_t pin, pincount;
247-
248-
vlapic = vcpu_vlapic(vcpu);
249-
vioapic = vm_ioapic(vcpu->vm);
250-
251-
spinlock_obtain(&(vioapic->mtx));
252-
pincount = vioapic_pincount(vcpu->vm);
253-
for (pin = 0U; pin < pincount; pin++) {
254-
rte = vioapic->rtbl[pin];
255-
256-
level = ((rte.full & IOAPIC_RTE_TRGRLVL) != 0UL);
257-
258-
/*
259-
* For a level-triggered 'pin' let the vlapic figure out if
260-
* an assertion on this 'pin' would result in an interrupt
261-
* being delivered to it. If yes, then it will modify the
262-
* TMR bit associated with this vector to level-triggered.
263-
*/
264-
delmode = (uint32_t)(rte.full & IOAPIC_RTE_DELMOD);
265-
vector = rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC;
266-
vlapic_set_tmr_one_vec(vlapic, delmode, vector, level);
267-
}
268-
vlapic_apicv_batch_set_tmr(vlapic);
269-
spinlock_release(&(vioapic->mtx));
270-
}
271-
272234
static uint32_t
273235
vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr)
274236
{

‎hypervisor/include/arch/x86/guest/guest.h

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -31,17 +31,16 @@
3131
/*
3232
* VCPU related APIs
3333
*/
34-
#define ACRN_REQUEST_EXCP 0U
35-
#define ACRN_REQUEST_EVENT 1U
36-
#define ACRN_REQUEST_EXTINT 2U
37-
#define ACRN_REQUEST_NMI 3U
38-
#define ACRN_REQUEST_TMR_UPDATE 4U
39-
#define ACRN_REQUEST_EPT_FLUSH 5U
40-
#define ACRN_REQUEST_TRP_FAULT 6U
41-
#define ACRN_REQUEST_VPID_FLUSH 7U /* flush vpid tlb */
42-
#define ACRN_REQUEST_EOI_EXIT_UPDATE 8U
43-
44-
#define E820_MAX_ENTRIES 32U
34+
#define ACRN_REQUEST_EXCP 0U
35+
#define ACRN_REQUEST_EVENT 1U
36+
#define ACRN_REQUEST_EXTINT 2U
37+
#define ACRN_REQUEST_NMI 3U
38+
#define ACRN_REQUEST_EOI_EXIT_UPDATE 4U
39+
#define ACRN_REQUEST_EPT_FLUSH 5U
40+
#define ACRN_REQUEST_TRP_FAULT 6U
41+
#define ACRN_REQUEST_VPID_FLUSH 7U /* flush vpid tlb */
42+
43+
#define E820_MAX_ENTRIES 32U
4544

4645
#define save_segment(seg, SEG_NAME) \
4746
{ \

‎hypervisor/include/arch/x86/guest/vioapic.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,6 @@ void vioapic_set_irqline_lock(const struct acrn_vm *vm, uint32_t irqline, uint32
9999
* @return None
100100
*/
101101
void vioapic_set_irqline_nolock(const struct acrn_vm *vm, uint32_t irqline, uint32_t operation);
102-
void vioapic_update_tmr(struct acrn_vcpu *vcpu);
103102

104103
uint32_t vioapic_pincount(const struct acrn_vm *vm);
105104
void vioapic_process_eoi(struct acrn_vm *vm, uint32_t vector);

‎hypervisor/include/arch/x86/guest/vlapic.h

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -227,15 +227,6 @@ int32_t vlapic_intr_msi(struct acrn_vm *vm, uint64_t addr, uint64_t msg);
227227
void vlapic_deliver_intr(struct acrn_vm *vm, bool level, uint32_t dest,
228228
bool phys, uint32_t delmode, uint32_t vec, bool rh);
229229

230-
/*
231-
* Set the trigger-mode bit associated with 'vector' to level-triggered if
232-
* the (dest,phys,delmode) tuple resolves to an interrupt being delivered to
233-
* this 'vlapic'.
234-
*/
235-
void vlapic_set_tmr_one_vec(struct acrn_vlapic *vlapic, uint32_t delmode,
236-
uint32_t vector, bool level);
237-
238-
void vlapic_apicv_batch_set_tmr(struct acrn_vlapic *vlapic);
239230
uint32_t vlapic_get_apicid(const struct acrn_vlapic *vlapic);
240231
int32_t vlapic_create(struct acrn_vcpu *vcpu);
241232
/*

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