@@ -1221,6 +1221,34 @@ in *VMX_PROC_VM_EXEC_CONTROLS*):
1221
1221
- For read: ``val = rdtsc() + exec_vmread64(VMX_TSC_OFFSET_FULL) ``
1222
1222
- For write: ``exec_vmwrite64(VMX_TSC_OFFSET_FULL, val - rdtsc()) ``
1223
1223
1224
+ ART Virtualization
1225
+ ******************
1226
+
1227
+ The invariant TSC is based on the invariant timekeeping hardware (called
1228
+ Always Running Timer or ART), that runs at the core crystal clock frequency.
1229
+ The ratio defined by CPUID leaf 15H express the frequency relationship
1230
+ between the ART hardware and TSC.
1231
+
1232
+ If CPUID.15H.EBX[31:0] != 0 and CPUID.80000007H:EDX[InvariantTSC] = 1, the
1233
+ following linearity relationship holds between TSC and the ART hardware:
1234
+
1235
+ ``TSC_Value = (ART_Value * CPUID.15H:EBX[31:0]) / CPUID.15H:EAX[31:0] + K ``
1236
+
1237
+ Where `K ` is an offset that can be adjusted by a privileged agent.
1238
+ When ART hardware is reset, both invariant TSC and K are also reset.
1239
+
1240
+ The guideline of ART virtualization (vART) is that software in native can run in
1241
+ VM too. The vART solution is:
1242
+
1243
+ - Present the ART capability to guest through CPUID leaf 15H for `CPUID.15H:EBX[31:0] `
1244
+ and `CPUID.15H:EAX[31:0] `.
1245
+ - Passthrough devices see the physical ART_Value (vART_Value = pART_Value)
1246
+ - Relationship between the ART and TSC in guest is:
1247
+ ``vTSC_Value = (vART_Value * CPUID.15H:EBX[31:0]) / CPUID.15H:EAX[31:0] + vK ``
1248
+ Where `vK = K + VMCS.TSC_OFFSET `.
1249
+ - If `vK ` or `vTSC_Value ` are changed by guest, we change the `VMCS.TSC_OFFSET ` accordingly.
1250
+ - `K ` should never be changed by hypervisor.
1251
+
1224
1252
XSAVE Emulation
1225
1253
***************
1226
1254
0 commit comments