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ZideChen0lijinxia
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hv: minor cleanup for dm/vpci code
- It makes more sense to return bool from pci_bar_access() - other minor changes for cleanup Tracked-On: #1568 Signed-off-by: dongshen <dongsheng.x.zhang@intel.com> Signed-off-by: Zide Chen <zide.chen@intel.com> Reviewed-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
1 parent bc4f82d commit 7b4b78c

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+12
-12
lines changed

2 files changed

+12
-12
lines changed

hypervisor/dm/hw/pci.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,8 @@
3131
#include <pci.h>
3232

3333
static spinlock_t pci_device_lock = {
34-
.head = 0,
35-
.tail = 0
34+
.head = 0U,
35+
.tail = 0U
3636
};
3737

3838
static uint32_t pci_pdev_calc_address(union pci_bdf bdf, uint32_t offset)
@@ -54,15 +54,15 @@ uint32_t pci_pdev_read_cfg(struct pci_pdev *pdev, uint32_t offset, uint32_t byte
5454
addr = pci_pdev_calc_address(pdev->bdf, offset);
5555

5656
/* Write address to ADDRESS register */
57-
pio_write(addr, PCI_CONFIG_ADDR, 4U);
57+
pio_write32(addr, PCI_CONFIG_ADDR);
5858

5959
/* Read result from DATA register */
6060
switch (bytes) {
6161
case 1U:
62-
val = pio_read8(PCI_CONFIG_DATA + (offset & 3U));
62+
val = (uint32_t)pio_read8(PCI_CONFIG_DATA + ((uint16_t)offset & 3U));
6363
break;
6464
case 2U:
65-
val = pio_read16(PCI_CONFIG_DATA + (offset & 2U));
65+
val = (uint32_t)pio_read16(PCI_CONFIG_DATA + ((uint16_t)offset & 2U));
6666
break;
6767
default:
6868
val = pio_read32(PCI_CONFIG_DATA);
@@ -83,15 +83,15 @@ void pci_pdev_write_cfg(struct pci_pdev *pdev, uint32_t offset, uint32_t bytes,
8383
addr = pci_pdev_calc_address(pdev->bdf, offset);
8484

8585
/* Write address to ADDRESS register */
86-
pio_write(addr, PCI_CONFIG_ADDR, 4U);
86+
pio_write32(addr, PCI_CONFIG_ADDR);
8787

8888
/* Write value to DATA register */
8989
switch (bytes) {
9090
case 1U:
91-
pio_write8(val, PCI_CONFIG_DATA + (offset & 3U));
91+
pio_write8((uint8_t)val, PCI_CONFIG_DATA + ((uint16_t)offset & 3U));
9292
break;
9393
case 2U:
94-
pio_write16(val, PCI_CONFIG_DATA + (offset & 2U));
94+
pio_write16((uint16_t)val, PCI_CONFIG_DATA + ((uint16_t)offset & 2U));
9595
break;
9696
default:
9797
pio_write32(val, PCI_CONFIG_DATA);

hypervisor/include/dm/pci.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -144,16 +144,16 @@ enum pci_bar_type {
144144

145145
static inline uint32_t pci_bar_offset(uint32_t idx)
146146
{
147-
return 0x10U + (idx << 2U);
147+
return PCIR_BARS + (idx << 2U);
148148
}
149149

150-
static inline int pci_bar_access(uint32_t offset)
150+
static inline bool pci_bar_access(uint32_t offset)
151151
{
152152
if ((offset >= pci_bar_offset(0U))
153153
&& (offset < pci_bar_offset(PCI_BAR_COUNT))) {
154-
return 1;
154+
return true;
155155
} else {
156-
return 0;
156+
return false;
157157
}
158158
}
159159

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