@@ -1319,24 +1319,13 @@ vlapic_svr_write_handler(struct acrn_vlapic *vlapic)
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}
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static int
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- vlapic_read (struct acrn_vlapic * vlapic , int mmio_access , uint32_t offset_arg ,
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+ vlapic_read (struct acrn_vlapic * vlapic , uint32_t offset_arg ,
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uint64_t * data )
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{
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struct lapic_regs * lapic = vlapic -> apic_page ;
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uint32_t i ;
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uint32_t offset = offset_arg ;
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- if (mmio_access == 0 ) {
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- /*
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- * XXX Generate GP fault for MSR accesses in xAPIC mode
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- */
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- dev_dbg (ACRN_DBG_LAPIC ,
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- "x2APIC MSR read from offset %#x in xAPIC mode" ,
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- offset );
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- * data = 0UL ;
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- goto done ;
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- }
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-
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if (offset > sizeof (* lapic )) {
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* data = 0UL ;
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goto done ;
@@ -1460,7 +1449,7 @@ vlapic_read(struct acrn_vlapic *vlapic, int mmio_access, uint32_t offset_arg,
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}
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static int
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- vlapic_write (struct acrn_vlapic * vlapic , int mmio_access , uint32_t offset ,
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+ vlapic_write (struct acrn_vlapic * vlapic , uint32_t offset ,
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uint64_t data )
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{
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struct lapic_regs * lapic = vlapic -> apic_page ;
@@ -1478,16 +1467,6 @@ vlapic_write(struct acrn_vlapic *vlapic, int mmio_access, uint32_t offset,
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return 0 ;
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}
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- /*
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- * XXX Generate GP fault for MSR accesses in xAPIC mode
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- */
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- if (mmio_access == 0 ) {
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- dev_dbg (ACRN_DBG_LAPIC ,
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- "x2APIC MSR write of %#lx to offset %#x in xAPIC mode" ,
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- data , offset );
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- return 0 ;
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- }
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-
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retval = 0 ;
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switch (offset ) {
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case APIC_OFFSET_ID :
@@ -1920,32 +1899,6 @@ vlapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg)
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return 0 ;
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}
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- static bool
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- is_x2apic_msr (uint32_t msr )
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- {
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- if ((msr >= 0x800U ) && (msr <= 0xBFFU )) {
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- return true;
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- } else {
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- return false;
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- }
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- }
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-
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- static uint32_t
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- x2apic_msr_to_regoff (uint32_t msr )
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- {
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- return (msr - 0x800U ) << 4U ;
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- }
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-
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- bool
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- is_vlapic_msr (uint32_t msr )
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- {
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- if (is_x2apic_msr (msr ) || (msr == MSR_IA32_APIC_BASE )) {
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- return true;
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- } else {
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- return false;
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- }
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- }
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-
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/* interrupt context */
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static int vlapic_timer_expired (void * data )
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{
@@ -1972,7 +1925,6 @@ int
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vlapic_rdmsr (struct vcpu * vcpu , uint32_t msr , uint64_t * rval )
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{
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int error = 0 ;
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- uint32_t offset ;
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struct acrn_vlapic * vlapic ;
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dev_dbg (ACRN_DBG_LAPIC , "cpu[%hu] rdmsr: %x" , vcpu -> vcpu_id , msr );
@@ -1988,8 +1940,8 @@ vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval)
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break ;
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default :
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- offset = x2apic_msr_to_regoff ( msr );
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- error = vlapic_read ( vlapic , 0 , offset , rval );
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+ dev_dbg ( ACRN_DBG_LAPIC ,
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+ "Invalid vmx vapic msr 0x%x access\n" , msr );
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break ;
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}
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@@ -2000,7 +1952,6 @@ int
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vlapic_wrmsr (struct vcpu * vcpu , uint32_t msr , uint64_t wval )
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{
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int error = 0 ;
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- uint32_t offset ;
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struct acrn_vlapic * vlapic ;
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vlapic = vcpu -> arch_vcpu .vlapic ;
@@ -2015,8 +1966,8 @@ vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval)
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break ;
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default :
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- offset = x2apic_msr_to_regoff ( msr );
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- error = vlapic_write ( vlapic , 0 , offset , wval );
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+ dev_dbg ( ACRN_DBG_LAPIC ,
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+ "Invalid vmx vapic msr 0x%x access\n" , msr );
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break ;
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}
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@@ -2044,7 +1995,7 @@ vlapic_write_mmio_reg(struct vcpu *vcpu, uint64_t gpa, uint64_t wval,
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}
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vlapic = vcpu -> arch_vcpu .vlapic ;
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- error = vlapic_write (vlapic , 1 , off , wval );
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+ error = vlapic_write (vlapic , off , wval );
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return error ;
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}
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@@ -2069,7 +2020,7 @@ vlapic_read_mmio_reg(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval,
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}
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vlapic = vcpu -> arch_vcpu .vlapic ;
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- error = vlapic_read (vlapic , 1 , off , rval );
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+ error = vlapic_read (vlapic , off , rval );
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return error ;
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}
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@@ -2408,10 +2359,10 @@ int apic_access_vmexit_handler(struct vcpu *vcpu)
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if (access_type == 1UL ) {
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if (emulate_instruction (vcpu ) == 0 ) {
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- err = vlapic_write (vlapic , 1 , offset , mmio -> value );
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+ err = vlapic_write (vlapic , offset , mmio -> value );
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}
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} else if (access_type == 0UL ) {
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- err = vlapic_read (vlapic , 1 , offset , & mmio -> value );
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+ err = vlapic_read (vlapic , offset , & mmio -> value );
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if (err < 0 ) {
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return err ;
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}
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