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ywan170wenlingz
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hv: apicv: remove x2apic related code
Currently, ACRN hasn't expose x2apic capability through cpuid. And x2apic related code in vlapic.c has no real functionality. This patch clear related code. Signed-off-by: Yu Wang <yu1.wang@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
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hypervisor/arch/x86/guest/vlapic.c

Lines changed: 10 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -1319,24 +1319,13 @@ vlapic_svr_write_handler(struct acrn_vlapic *vlapic)
13191319
}
13201320

13211321
static int
1322-
vlapic_read(struct acrn_vlapic *vlapic, int mmio_access, uint32_t offset_arg,
1322+
vlapic_read(struct acrn_vlapic *vlapic, uint32_t offset_arg,
13231323
uint64_t *data)
13241324
{
13251325
struct lapic_regs *lapic = vlapic->apic_page;
13261326
uint32_t i;
13271327
uint32_t offset = offset_arg;
13281328

1329-
if (mmio_access == 0) {
1330-
/*
1331-
* XXX Generate GP fault for MSR accesses in xAPIC mode
1332-
*/
1333-
dev_dbg(ACRN_DBG_LAPIC,
1334-
"x2APIC MSR read from offset %#x in xAPIC mode",
1335-
offset);
1336-
*data = 0UL;
1337-
goto done;
1338-
}
1339-
13401329
if (offset > sizeof(*lapic)) {
13411330
*data = 0UL;
13421331
goto done;
@@ -1460,7 +1449,7 @@ vlapic_read(struct acrn_vlapic *vlapic, int mmio_access, uint32_t offset_arg,
14601449
}
14611450

14621451
static int
1463-
vlapic_write(struct acrn_vlapic *vlapic, int mmio_access, uint32_t offset,
1452+
vlapic_write(struct acrn_vlapic *vlapic, uint32_t offset,
14641453
uint64_t data)
14651454
{
14661455
struct lapic_regs *lapic = vlapic->apic_page;
@@ -1478,16 +1467,6 @@ vlapic_write(struct acrn_vlapic *vlapic, int mmio_access, uint32_t offset,
14781467
return 0;
14791468
}
14801469

1481-
/*
1482-
* XXX Generate GP fault for MSR accesses in xAPIC mode
1483-
*/
1484-
if (mmio_access == 0) {
1485-
dev_dbg(ACRN_DBG_LAPIC,
1486-
"x2APIC MSR write of %#lx to offset %#x in xAPIC mode",
1487-
data, offset);
1488-
return 0;
1489-
}
1490-
14911470
retval = 0;
14921471
switch (offset) {
14931472
case APIC_OFFSET_ID:
@@ -1920,32 +1899,6 @@ vlapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg)
19201899
return 0;
19211900
}
19221901

1923-
static bool
1924-
is_x2apic_msr(uint32_t msr)
1925-
{
1926-
if ((msr >= 0x800U) && (msr <= 0xBFFU)) {
1927-
return true;
1928-
} else {
1929-
return false;
1930-
}
1931-
}
1932-
1933-
static uint32_t
1934-
x2apic_msr_to_regoff(uint32_t msr)
1935-
{
1936-
return (msr - 0x800U) << 4U;
1937-
}
1938-
1939-
bool
1940-
is_vlapic_msr(uint32_t msr)
1941-
{
1942-
if (is_x2apic_msr(msr) || (msr == MSR_IA32_APIC_BASE)) {
1943-
return true;
1944-
} else {
1945-
return false;
1946-
}
1947-
}
1948-
19491902
/* interrupt context */
19501903
static int vlapic_timer_expired(void *data)
19511904
{
@@ -1972,7 +1925,6 @@ int
19721925
vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval)
19731926
{
19741927
int error = 0;
1975-
uint32_t offset;
19761928
struct acrn_vlapic *vlapic;
19771929

19781930
dev_dbg(ACRN_DBG_LAPIC, "cpu[%hu] rdmsr: %x", vcpu->vcpu_id, msr);
@@ -1988,8 +1940,8 @@ vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval)
19881940
break;
19891941

19901942
default:
1991-
offset = x2apic_msr_to_regoff(msr);
1992-
error = vlapic_read(vlapic, 0, offset, rval);
1943+
dev_dbg(ACRN_DBG_LAPIC,
1944+
"Invalid vmx vapic msr 0x%x access\n", msr);
19931945
break;
19941946
}
19951947

@@ -2000,7 +1952,6 @@ int
20001952
vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval)
20011953
{
20021954
int error = 0;
2003-
uint32_t offset;
20041955
struct acrn_vlapic *vlapic;
20051956

20061957
vlapic = vcpu->arch_vcpu.vlapic;
@@ -2015,8 +1966,8 @@ vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t wval)
20151966
break;
20161967

20171968
default:
2018-
offset = x2apic_msr_to_regoff(msr);
2019-
error = vlapic_write(vlapic, 0, offset, wval);
1969+
dev_dbg(ACRN_DBG_LAPIC,
1970+
"Invalid vmx vapic msr 0x%x access\n", msr);
20201971
break;
20211972
}
20221973

@@ -2044,7 +1995,7 @@ vlapic_write_mmio_reg(struct vcpu *vcpu, uint64_t gpa, uint64_t wval,
20441995
}
20451996

20461997
vlapic = vcpu->arch_vcpu.vlapic;
2047-
error = vlapic_write(vlapic, 1, off, wval);
1998+
error = vlapic_write(vlapic, off, wval);
20481999
return error;
20492000
}
20502001

@@ -2069,7 +2020,7 @@ vlapic_read_mmio_reg(struct vcpu *vcpu, uint64_t gpa, uint64_t *rval,
20692020
}
20702021

20712022
vlapic = vcpu->arch_vcpu.vlapic;
2072-
error = vlapic_read(vlapic, 1, off, rval);
2023+
error = vlapic_read(vlapic, off, rval);
20732024
return error;
20742025
}
20752026

@@ -2408,10 +2359,10 @@ int apic_access_vmexit_handler(struct vcpu *vcpu)
24082359

24092360
if (access_type == 1UL) {
24102361
if (emulate_instruction(vcpu) == 0) {
2411-
err = vlapic_write(vlapic, 1, offset, mmio->value);
2362+
err = vlapic_write(vlapic, offset, mmio->value);
24122363
}
24132364
} else if (access_type == 0UL) {
2414-
err = vlapic_read(vlapic, 1, offset, &mmio->value);
2365+
err = vlapic_read(vlapic, offset, &mmio->value);
24152366
if (err < 0) {
24162367
return err;
24172368
}

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