HV:misc:add suffix U to the numeric constant

Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

Author: Shawnshh

hypervisor/arch/x86/assign.c

@@ -947,8 +947,8 @@ static void get_entry_info(struct ptdev_remapping_info *entry, char *type,
 	} else {
 		strcpy_s(type, 16, "NONE");
 		*irq = IRQ_INVALID;
-		*vector = 0;
-		*dest = 0;
+		*vector = 0U;
+		*dest = 0UL;
 		*lvl_tm = 0;
 		*pin = -1;
 		*vpin = -1;

hypervisor/arch/x86/cpu.c

@@ -13,13 +13,13 @@
 #endif
 
 spinlock_t trampoline_spinlock = {
-	.head = 0,
-	.tail = 0
+	.head = 0U,
+	.tail = 0U
 };
 
 spinlock_t up_count_spinlock = {
-	.head = 0,
-	.tail = 0
+	.head = 0U,
+	.tail = 0U
 };
 
 struct per_cpu_region *per_cpu_data_base_ptr;
@@ -87,7 +87,7 @@ static inline bool get_monitor_cap(void)
 		 * in hypervisor, but still expose it to the guests and
 		 * let them handle it correctly
 		 */
-		if (boot_cpu_data.x86 != 0x6 || boot_cpu_data.x86_model != 0x5c)
+		if (boot_cpu_data.x86 != 0x6U || boot_cpu_data.x86_model != 0x5cU)
 			return true;
 	}
 
@@ -188,8 +188,8 @@ static int hardware_detect_support(void)
 		pr_fatal("%s, LM not supported\n", __func__);
 		return -ENODEV;
 	}
-	if ((boot_cpu_data.x86_phys_bits == 0) ||
-		(boot_cpu_data.x86_virt_bits == 0)) {
+	if ((boot_cpu_data.x86_phys_bits == 0U) ||
+		(boot_cpu_data.x86_virt_bits == 0U)) {
 		pr_fatal("%s, can't detect Linear/Physical Address size\n",
 			__func__);
 		return -ENODEV;
@@ -255,7 +255,7 @@ uint16_t __attribute__((weak)) parse_madt(uint8_t *lapic_id_base)
 	static const uint8_t lapic_id[] = {0U, 2U, 4U, 6U};
 	uint32_t i;
 
-	for (i = 0; i < ARRAY_SIZE(lapic_id); i++)
+	for (i = 0U; i < ARRAY_SIZE(lapic_id); i++)
 		*lapic_id_base++ = lapic_id[i];
 
 	return ARRAY_SIZE(lapic_id);
@@ -729,7 +729,7 @@ void start_cpus()
 	 * configured time-out has expired
 	 */
 	timeout = CONFIG_CPU_UP_TIMEOUT * 1000;
-	while ((up_count != expected_up) && (timeout != 0)) {
+	while ((up_count != expected_up) && (timeout != 0U)) {
 		/* Delay 10us */
 		udelay(10);
 
@@ -762,7 +762,7 @@ void stop_cpus()
 	}
 
 	expected_up = 1;
-	while ((up_count != expected_up) && (timeout !=0)) {
+	while ((up_count != expected_up) && (timeout != 0U)) {
 		/* Delay 10us */
 		udelay(10);
 
@@ -875,11 +875,11 @@ static void vapic_cap_detect(void)
 	uint8_t features;
 	uint64_t msr_val;
 
-	features = 0;
+	features = 0U;
 
 	msr_val = msr_read(MSR_IA32_VMX_PROCBASED_CTLS);
 	if (!is_ctrl_setting_allowed(msr_val, VMX_PROCBASED_CTLS_TPR_SHADOW)) {
-		cpu_caps.vapic_features = 0;
+		cpu_caps.vapic_features = 0U;
 		return;
 	}
 	features |= VAPIC_FEATURE_TPR_SHADOW;

hypervisor/arch/x86/ept.c

@@ -57,13 +57,13 @@ void free_ept_mem(void *pml4_addr)
 		return;
 	}
 
-	for (pml4_index = 0; pml4_index < IA32E_NUM_ENTRIES; pml4_index++) {
+	for (pml4_index = 0U; pml4_index < IA32E_NUM_ENTRIES; pml4_index++) {
 		/* Walk from the PML4 table to the PDPT table */
 		pdpt_addr = HPA2HVA(find_next_table(pml4_index, pml4_addr));
 		if (pdpt_addr == NULL)
 			continue;
 
-		for (pdpt_index = 0; pdpt_index < IA32E_NUM_ENTRIES;
+		for (pdpt_index = 0U; pdpt_index < IA32E_NUM_ENTRIES;
 				pdpt_index++) {
 			/* Walk from the PDPT table to the PD table */
 			pde_addr = HPA2HVA(find_next_table(pdpt_index,
@@ -72,7 +72,7 @@ void free_ept_mem(void *pml4_addr)
 			if (pde_addr == NULL)
 				continue;
 
-			for (pde_index = 0; pde_index < IA32E_NUM_ENTRIES;
+			for (pde_index = 0U; pde_index < IA32E_NUM_ENTRIES;
 					pde_index++) {
 				/* Walk from the PD table to the page table */
 				pte_addr = HPA2HVA(find_next_table(pde_index,
@@ -105,7 +105,7 @@ void destroy_ept(struct vm *vm)
 	 */
 	if (vm->sworld_control.sworld_enabled && (vm->arch_vm.sworld_eptp != 0U)) {
 		free_ept_mem(HPA2HVA(vm->arch_vm.sworld_eptp));
-		vm->arch_vm.sworld_eptp = 0;
+		vm->arch_vm.sworld_eptp = 0UL;
 	}
 }
 
@@ -319,7 +319,7 @@ static int dm_emulate_mmio_pre(struct vcpu *vcpu, uint64_t exit_qual)
 			vcpu->req.type = REQ_WP;
 	}
 
-	if (vcpu->req.type == 0)
+	if (vcpu->req.type == 0U)
 		vcpu->req.type = REQ_MMIO;
 	vcpu->req.reqs.mmio_request.direction = vcpu->mmio.read_write;
 	vcpu->req.reqs.mmio_request.address = (long)vcpu->mmio.paddr;
@@ -349,7 +349,7 @@ int ept_violation_vmexit_handler(struct vcpu *vcpu)
 		/* TODO: Need to figure out how to determine value being
 		 * written
 		 */
-		mmio->value = 0;
+		mmio->value = 0UL;
 	} else {
 		/* Read operation */
 		mmio->read_write = HV_MEM_IO_READ;
@@ -358,7 +358,7 @@ int ept_violation_vmexit_handler(struct vcpu *vcpu)
 		/* TODO: Need to determine how sign extension is determined for
 		 * reads
 		 */
-		mmio->sign_extend_read = 0;
+		mmio->sign_extend_read = 0U;
 	}
 
 	/* Get the guest physical address */

hypervisor/arch/x86/gdt.c

@@ -37,13 +37,13 @@ void load_gdtr_and_tr(void)
 	tss->ist1 = (uint64_t)get_cpu_var(mc_stack) + CONFIG_STACK_SIZE;
 	tss->ist2 = (uint64_t)get_cpu_var(df_stack) + CONFIG_STACK_SIZE;
 	tss->ist3 = (uint64_t)get_cpu_var(sf_stack) + CONFIG_STACK_SIZE;
-	tss->ist4 = 0L;
+	tss->ist4 = 0UL;
 
 	/* tss descriptor */
 	set_tss_desc(&gdt->host_gdt_tss_descriptors,
 		(void *)tss, sizeof(struct tss_64), TSS_AVAIL);
 
-	gdtr.len = sizeof(struct host_gdt) - 1;
+	gdtr.len = sizeof(struct host_gdt) - 1U;
 	gdtr.gdt = gdt;
 
 	asm volatile ("lgdt %0" ::"m"(gdtr));

hypervisor/arch/x86/io.c

@@ -12,7 +12,7 @@ int dm_emulate_pio_post(struct vcpu *vcpu)
 	int cur_context = vcpu->arch_vcpu.cur_context;
 	union vhm_request_buffer *req_buf = NULL;
 	uint32_t mask =
-		0xFFFFFFFFul >> (32 - 8 * vcpu->req.reqs.pio_request.size);
+		0xFFFFFFFFUL >> (32 - 8 * vcpu->req.reqs.pio_request.size);
 	uint64_t *rax;
 
 	req_buf = (union vhm_request_buffer *)(vcpu->vm->sw.io_shared_page);
@@ -164,7 +164,7 @@ void allow_guest_io_access(struct vm *vm, uint32_t address, uint32_t nbytes)
 	uint32_t a;
 
 	b = vm->arch_vm.iobitmap[0];
-	for (i = 0; i < nbytes; i++) {
+	for (i = 0U; i < nbytes; i++) {
 		if ((address & 0x8000U) != 0U)
 			b = vm->arch_vm.iobitmap[1];
 		a = address & 0x7fffU;
@@ -180,11 +180,11 @@ static void deny_guest_io_access(struct vm *vm, uint32_t address, uint32_t nbyte
 	uint32_t a;
 
 	b = vm->arch_vm.iobitmap[0];
-	for (i = 0; i < nbytes; i++) {
+	for (i = 0U; i < nbytes; i++) {
 		if ((address & 0x8000U) != 0U)
 			b = vm->arch_vm.iobitmap[1];
 		a = address & 0x7fffU;
-		b[a >> 5] |= (1 << (a & 0x1fU));
+		b[a >> 5U] |= (1U << (a & 0x1fU));
 		address++;
 	}
 }

hypervisor/arch/x86/mmu.c

@@ -296,13 +296,13 @@ static uint32_t map_mem_region(void *vaddr, void *paddr,
 	default:
 
 		/* Set mapping size to 0 - can't map memory in PML4 */
-		mapped_size = 0;
+		mapped_size = 0U;
 
 		break;
 	}
 
 	/* Check to see if mapping should occur */
-	if (mapped_size != 0) {
+	if (mapped_size != 0U) {
 		/* Get current table entry */
 		uint64_t entry = MEM_READ64(table_base + table_offset);
 		bool prev_entry_present = false;
@@ -415,7 +415,7 @@ static uint32_t map_mem_region(void *vaddr, void *paddr,
 			 * TODO: add shootdown APs operation if MMU will be
 			 * modified after AP start in the future.
 			 */
-			if ((phys_cpu_num != 0) &&
+			if ((phys_cpu_num != 0U) &&
 				((pcpu_active_bitmap &
 				((1UL << phys_cpu_num) - 1))
 				!= (1UL << CPU_BOOT_ID))) {
@@ -620,7 +620,7 @@ void init_paging(void)
 			attr_uc);
 
 	/* Modify WB attribute for E820_TYPE_RAM */
-	for (i = 0, entry = &e820[0];
+	for (i = 0U, entry = &e820[0];
 			i < e820_entries;
 			i++, entry = &e820[i]) {
 		if (entry->type == E820_TYPE_RAM) {
@@ -864,10 +864,10 @@ static uint64_t update_page_table_entry(struct map_params *map_params,
 static uint64_t break_page_table(struct map_params *map_params, void *paddr,
 		void *vaddr, uint64_t page_size, bool direct)
 {
-	uint32_t i = 0;
+	uint32_t i = 0U;
 	uint64_t pa;
-	uint64_t attr = 0x00;
-	uint64_t next_page_size = 0x00;
+	uint64_t attr = 0x0UL;
+	uint64_t next_page_size = 0x0UL;
 	void *sub_tab_addr = NULL;
 	struct entry_params entry;
 
@@ -930,7 +930,7 @@ static uint64_t break_page_table(struct map_params *map_params, void *paddr,
 			attr |= (entry.entry_val & 0x7fUL);
 		}
 		/* write all entries and keep original attr*/
-		for (i = 0; i < IA32E_NUM_ENTRIES; i++) {
+		for (i = 0U; i < IA32E_NUM_ENTRIES; i++) {
 			MEM_WRITE64(sub_tab_addr + (i * IA32E_COMM_ENTRY_SIZE),
 					(attr | (pa + (i * next_page_size))));
 		}
@@ -1033,7 +1033,7 @@ static int modify_paging(struct map_params *map_params, void *paddr,
 				 */
 				page_size = break_page_table(map_params,
 					paddr, vaddr, page_size, direct);
-				if (page_size == 0)
+				if (page_size == 0UL)
 					return -EINVAL;
 			}
 		} else {
@@ -1043,7 +1043,7 @@ static int modify_paging(struct map_params *map_params, void *paddr,
 		/* The function return the memory size that one entry can map */
 		adjust_size = update_page_table_entry(map_params, paddr, vaddr,
 				page_size, attr, request_type, direct);
-		if (adjust_size == 0)
+		if (adjust_size == 0UL)
 			return -EINVAL;
 		vaddr += adjust_size;
 		paddr += adjust_size;

hypervisor/arch/x86/notify.c

@@ -46,7 +46,7 @@ void setup_notification(void)
 	char name[32] = {0};
 
 	cpu = get_cpu_id();
-	if (cpu > 0)
+	if (cpu > 0U)
 		return;
 
 	/* support IPI notification, VM0 will register all CPU */

hypervisor/arch/x86/softirq.c

@@ -21,7 +21,7 @@ void init_softirq(void)
 	uint16_t pcpu_id;
 
 	for (pcpu_id = 0U; pcpu_id < phys_cpu_num; pcpu_id++) {
-		per_cpu(softirq_pending, pcpu_id) = 0;
+		per_cpu(softirq_pending, pcpu_id) = 0UL;
 		bitmap_set(SOFTIRQ_ATOMIC, &per_cpu(softirq_pending, pcpu_id));
 	}
 }

hypervisor/arch/x86/trusty.c

@@ -28,9 +28,9 @@ struct trusty_mem {
 
 static struct key_info g_key_info = {
 	.size_of_this_struct = sizeof(g_key_info),
-	.version = 0,
-	.platform = 3,
-	.num_seeds = 1
+	.version = 0U,
+	.platform = 3U,
+	.num_seeds = 1U
 };
 
 #define save_segment(seg, SEG_NAME) \
@@ -71,7 +71,7 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
 	}
 
 	if (!vm->sworld_control.sworld_enabled
-			|| vm->arch_vm.sworld_eptp != 0) {
+			|| vm->arch_vm.sworld_eptp != 0UL) {
 		pr_err("Sworld is not enabled or Sworld eptp is not NULL");
 		return;
 	}
@@ -323,7 +323,7 @@ static bool setup_trusty_info(struct vcpu *vcpu,
 			sizeof(mem->first_page.data.key_info.dseed_list));
 	/* Derive dvseed from dseed for Trusty */
 	key_info = &mem->first_page.data.key_info;
-	for (i = 0; i < g_key_info.num_seeds; i++) {
+	for (i = 0U; i < g_key_info.num_seeds; i++) {
 		if (hkdf_sha256(key_info->dseed_list[i].seed,
 				BUP_MKHI_BOOTLOADER_SEED_LEN,
 				g_key_info.dseed_list[i].seed,
@@ -364,11 +364,11 @@ static bool init_secure_world_env(struct vcpu *vcpu,
 				uint64_t base_hpa,
 				uint32_t size)
 {
-	vcpu->arch_vcpu.inst_len = 0;
+	vcpu->arch_vcpu.inst_len = 0U;
 	vcpu->arch_vcpu.contexts[SECURE_WORLD].rip = entry_gpa;
 	vcpu->arch_vcpu.contexts[SECURE_WORLD].rsp =
 		TRUSTY_EPT_REBASE_GPA + size;
-	vcpu->arch_vcpu.contexts[SECURE_WORLD].tsc_offset = 0;
+	vcpu->arch_vcpu.contexts[SECURE_WORLD].tsc_offset = 0UL;
 
 	vcpu->arch_vcpu.contexts[SECURE_WORLD].cr0 =
 		vcpu->arch_vcpu.contexts[NORMAL_WORLD].cr0;
@@ -412,12 +412,12 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
 		return false;
 	}
 
-	if (boot_param->entry_point == 0) {
+	if (boot_param->entry_point == 0U) {
 		pr_err("%s: Invalid entry point\n", __func__);
 		return false;
 	}
 
-	if (boot_param->base_addr == 0) {
+	if (boot_param->base_addr == 0U) {
 		pr_err("%s: Invalid memory base address\n", __func__);
 		return false;
 	}
@@ -451,7 +451,7 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
 void trusty_set_dseed(void *dseed, uint8_t dseed_num)
 {
 	/* Use fake seed if input param is invalid */
-	if ((dseed == NULL) || (dseed_num == 0) ||
+	if ((dseed == NULL) || (dseed_num == 0U) ||
 		(dseed_num > BOOTLOADER_SEED_MAX_ENTRIES)) {
 
 		g_key_info.num_seeds = 1;

hypervisor/arch/x86/vmexit.c

@@ -307,7 +307,7 @@ static int xsetbv_vmexit_handler(struct vcpu *vcpu)
 
 	val64 = exec_vmread(VMX_GUEST_CR4);
 	if ((val64 & CR4_OSXSAVE) == 0U) {
-		vcpu_inject_gp(vcpu, 0);
+		vcpu_inject_gp(vcpu, 0U);
 		return -1;
 	}