@@ -88,7 +88,7 @@ static inline void vlapic_dump_irr(__unused const struct acrn_vlapic *vlapic, __
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static inline void vlapic_dump_isr (__unused const struct acrn_vlapic * vlapic , __unused const char * msg ) {}
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#endif
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- static const struct acrn_apicv_ops * apicv_ops ;
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+ const struct acrn_apicv_ops * apicv_ops ;
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static int32_t
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apicv_set_intr_ready (struct acrn_vlapic * vlapic , uint32_t vector );
@@ -565,7 +565,7 @@ static void vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool
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if ((lapic -> svr .v & APIC_SVR_ENABLE ) == 0U ) {
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dev_dbg (ACRN_DBG_LAPIC , "vlapic is software disabled, ignoring interrupt %u" , vector );
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} else {
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- apicv_ops -> accept_intr (vlapic , vector , level );
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+ vlapic -> ops -> accept_intr (vlapic , vector , level );
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}
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}
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@@ -1609,8 +1609,11 @@ static int32_t vlapic_write(struct acrn_vlapic *vlapic, uint32_t offset, uint64_
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return ret ;
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}
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+ /*
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+ * @pre vlapic != NULL && ops != NULL
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+ */
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void
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- vlapic_reset (struct acrn_vlapic * vlapic )
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+ vlapic_reset (struct acrn_vlapic * vlapic , const struct acrn_apicv_ops * ops )
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{
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uint32_t i ;
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struct lapic_regs * lapic ;
@@ -1648,6 +1651,8 @@ vlapic_reset(struct acrn_vlapic *vlapic)
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}
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vlapic -> isrv = 0U ;
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+
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+ vlapic -> ops = ops ;
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}
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/**
@@ -1659,7 +1664,7 @@ vlapic_init(struct acrn_vlapic *vlapic)
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{
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vlapic_init_timer (vlapic );
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- vlapic_reset (vlapic );
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+ vlapic_reset (vlapic , apicv_ops );
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}
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void vlapic_restore (struct acrn_vlapic * vlapic , const struct lapic_regs * regs )
@@ -2056,7 +2061,7 @@ int32_t vlapic_x2apic_read(struct acrn_vcpu *vcpu, uint32_t msr, uint64_t *val)
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}
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} else {
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offset = x2apic_msr_to_regoff (msr );
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- if (apicv_ops -> x2apic_read_msr_may_valid (offset )) {
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+ if (vlapic -> ops -> x2apic_read_msr_may_valid (offset )) {
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error = vlapic_read (vlapic , offset , val );
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}
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}
@@ -2088,7 +2093,7 @@ int32_t vlapic_x2apic_write(struct acrn_vcpu *vcpu, uint32_t msr, uint64_t val)
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}
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} else {
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offset = x2apic_msr_to_regoff (msr );
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- if (apicv_ops -> x2apic_write_msr_may_valid (offset )) {
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+ if (vlapic -> ops -> x2apic_write_msr_may_valid (offset )) {
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error = vlapic_write (vlapic , offset , val );
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}
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}
@@ -2280,7 +2285,7 @@ static bool apicv_advanced_inject_intr(struct acrn_vlapic *vlapic,
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bool vlapic_inject_intr (struct acrn_vlapic * vlapic , bool guest_irq_enabled , bool injected )
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{
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- return apicv_ops -> inject_intr (vlapic , guest_irq_enabled , injected );
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+ return vlapic -> ops -> inject_intr (vlapic , guest_irq_enabled , injected );
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}
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static bool apicv_basic_has_pending_delivery_intr (struct acrn_vcpu * vcpu )
@@ -2306,7 +2311,8 @@ static bool apicv_advanced_has_pending_delivery_intr(__unused struct acrn_vcpu *
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bool vlapic_has_pending_delivery_intr (struct acrn_vcpu * vcpu )
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{
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- return apicv_ops -> has_pending_delivery_intr (vcpu );
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+ struct acrn_vlapic * vlapic = vcpu_vlapic (vcpu );
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+ return vlapic -> ops -> has_pending_delivery_intr (vcpu );
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}
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static bool apicv_basic_apic_read_access_may_valid (__unused uint32_t offset )
@@ -2363,12 +2369,12 @@ int32_t apic_access_vmexit_handler(struct acrn_vcpu *vcpu)
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if (access_type == TYPE_LINEAR_APIC_INST_WRITE ) {
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err = emulate_instruction (vcpu );
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if (err == 0 ) {
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- if (apicv_ops -> apic_write_access_may_valid (offset )) {
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+ if (vlapic -> ops -> apic_write_access_may_valid (offset )) {
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(void )vlapic_write (vlapic , offset , mmio -> value );
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}
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}
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} else {
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- if (apicv_ops -> apic_read_access_may_valid (offset )) {
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+ if (vlapic -> ops -> apic_read_access_may_valid (offset )) {
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(void )vlapic_read (vlapic , offset , & mmio -> value );
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} else {
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mmio -> value = 0UL ;
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