hv: vlapic: refine apicv_post_intr to internal function

Rename vlapic_post_intr to apicv_post_intr and move it to internal function
since it's only used in vlaic.c.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>

Author: lifeix

doc/developer-guides/hld/hv-virt-interrupt.rst

@@ -106,9 +106,6 @@ These APIs will finish by making a request for *ACRN_REQUEST_EVENT.*
 .. doxygenfunction:: vlapic_intr_msi
   :project: Project ACRN
 
-.. doxygenfunction:: vlapic_post_intr
-  :project: Project ACRN
-
 .. doxygenfunction:: apicv_get_pir_desc_paddr
   :project: Project ACRN
 

hypervisor/arch/x86/guest/vlapic.c

@@ -90,6 +90,8 @@ static inline void vlapic_dump_isr(__unused const struct acrn_vlapic *vlapic, __
 static int32_t
 apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector);
 
+static void apicv_post_intr(uint16_t dest_pcpu_id);
+
 /*
  * Post an interrupt to the vcpu running on 'hostcpu'. This will use a
  * hardware assist if available (e.g. Posted Interrupt) or fall back to
@@ -522,7 +524,7 @@ vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level)
 			 *    it to vCPU in next vmentry.
 			 */
 			bitmap_set_lock(ACRN_REQUEST_EVENT, &vlapic->vcpu->arch.pending_req);
-			vlapic_post_intr(vlapic->vcpu->pcpu_id);
+			apicv_post_intr(vlapic->vcpu->pcpu_id);
 			ret = false;
 		} else {
 			ret = (pending_intr != 0);
@@ -555,7 +557,7 @@ vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level)
  *
  * @return None
  */
-void vlapic_post_intr(uint16_t dest_pcpu_id)
+static void apicv_post_intr(uint16_t dest_pcpu_id)
 {
 	send_single_ipi(dest_pcpu_id, VECTOR_POSTED_INTR);
 }

hypervisor/include/arch/x86/guest/vlapic.h

@@ -155,20 +155,6 @@ bool vlapic_find_deliverable_intr(const struct acrn_vlapic *vlapic, uint32_t *ve
  */
 void vlapic_get_deliverable_intr(struct acrn_vlapic *vlapic, uint32_t vector);
 
-/**
- * @brief Send notification vector to target pCPU.
- *
- * If APICv Posted-Interrupt is enabled and target pCPU is in non-root mode,
- * pCPU will sync pending virtual interrupts from PIR to vIRR automatically,
- * without VM exit.
- * If pCPU in root-mode, virtual interrupt will be injected in next VM entry.
- *
- * @param[in] dest_pcpu_id Target CPU ID.
- *
- * @return None
- */
-void vlapic_post_intr(uint16_t dest_pcpu_id);
-
 /**
  * @brief Get physical address to PIR description.
  *