DM: build UOS DSDT with vcpu px state data

With the DSDT which include virtual _PSS/_PCT/_PPC objects, UOS should
have ACPI Px control capability if acpi cpufreq driver is enalbed in
kernel.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>

Author: jsun26intel

devicemodel/hw/acpi/acpi.c

@@ -764,6 +764,9 @@ basl_fwrite_dsdt(FILE *fp, struct vmctx *ctx)
 	dsdt_line("      })");
 	dsdt_line("    }");
 	dsdt_line("  }");
+
+	pm_write_dsdt(ctx, basl_ncpu);
+
 	dsdt_line("}");
 
 	if (dsdt_error != 0)

devicemodel/hw/acpi/acpi_pm.c

@@ -86,15 +86,15 @@ static int get_vcpu_px_data(struct vmctx *ctx, int vcpu_id,
 /* _PPC: Performance Present Capabilities
  * hard code _PPC to 0,  all states are available.
  */
-void dsdt_write_ppc(void)
+static void dsdt_write_ppc(void)
 {
 	dsdt_line("    Name (_PPC, Zero)");
 }
 
 /* _PCT: Performance Control
  * Both Performance Control and Status Register are set to FFixedHW
  */
-void dsdt_write_pct(void)
+static void dsdt_write_pct(void)
 {
 	dsdt_line("        Method (_PCT, 0, NotSerialized)");
 	dsdt_line("        {");
@@ -124,7 +124,7 @@ void dsdt_write_pct(void)
 
 /* _PSS: Performance Supported States
  */
-void dsdt_write_pss(struct vmctx *ctx, int vcpu_id)
+static void dsdt_write_pss(struct vmctx *ctx, int vcpu_id)
 {
 	uint8_t vcpu_px_cnt;
 	struct cpu_px_data *vcpu_px_data;
@@ -183,3 +183,45 @@ void dsdt_write_pss(struct vmctx *ctx, int vcpu_id)
 	free(vcpu_px_data);
 
 }
+
+void pm_write_dsdt(struct vmctx *ctx, int ncpu)
+{
+	/* Scope (_PR) */
+	dsdt_line("");
+	dsdt_line("  Scope (_PR)");
+	dsdt_line("  {");
+	for (int i = 0; i < ncpu; i++) {
+		dsdt_line("    Processor (CPU%d, 0x%02X, 0x00000000, 0x00) {}",
+					i, i);
+	}
+	dsdt_line("  }");
+	dsdt_line("");
+
+	/* Scope (_PR.CPU(N)) */
+	for (int i = 0; i < ncpu; i++) {
+		dsdt_line("  Scope (_PR.CPU%d)", i);
+		dsdt_line("  {");
+		dsdt_line("");
+
+		dsdt_write_pss(ctx, i);
+
+		/* hard code _PPC and _PCT for all vpu */
+		if (i == 0) {
+			dsdt_write_ppc();
+			dsdt_write_pct();
+		} else {
+			dsdt_line("    Method (_PPC, 0, NotSerialized)");
+			dsdt_line("    {");
+			dsdt_line("      Return (^^CPU0._PPC)");
+			dsdt_line("    }");
+			dsdt_line("");
+			dsdt_line("    Method (_PCT, 0, NotSerialized)");
+			dsdt_line("    {");
+			dsdt_line("      Return (^^CPU0._PCT)");
+			dsdt_line("    }");
+			dsdt_line("");
+		}
+
+		dsdt_line("  }");
+	}
+}

devicemodel/include/acpi.h

@@ -57,5 +57,6 @@ void	dsdt_fixed_mem32(uint32_t base, uint32_t length);
 void	dsdt_indent(int levels);
 void	dsdt_unindent(int levels);
 void	sci_init(struct vmctx *ctx);
+void	pm_write_dsdt(struct vmctx *ctx, int ncpu);
 
 #endif /* _ACPI_H_ */