Skip to content

Commit ad59375

Browse files
fyin1lijinxia
fyin1
authored and
lijinxia
committed
hv: cpu_context is not only used by guest.
It could be also used by host as well. So we remove GUEST from MACRO name Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Acked-by: Eddie Dong <Eddie.dong@intel.com>
1 parent 1d66aaa commit ad59375

File tree

4 files changed

+124
-108
lines changed

4 files changed

+124
-108
lines changed

‎hypervisor/arch/x86/cpu.c

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -376,55 +376,55 @@ void bsp_boot_init(void)
376376

377377
ASSERT(NR_WORLD == 2, "Only 2 Worlds supported!");
378378
ASSERT(offsetof(struct cpu_regs, rax) ==
379-
VMX_MACHINE_T_GUEST_RAX_OFFSET,
379+
CPU_CONTEXT_OFFSET_RAX,
380380
"cpu_regs rax offset not match");
381381
ASSERT(offsetof(struct cpu_regs, rbx) ==
382-
VMX_MACHINE_T_GUEST_RBX_OFFSET,
382+
CPU_CONTEXT_OFFSET_RBX,
383383
"cpu_regs rbx offset not match");
384384
ASSERT(offsetof(struct cpu_regs, rcx) ==
385-
VMX_MACHINE_T_GUEST_RCX_OFFSET,
385+
CPU_CONTEXT_OFFSET_RCX,
386386
"cpu_regs rcx offset not match");
387387
ASSERT(offsetof(struct cpu_regs, rdx) ==
388-
VMX_MACHINE_T_GUEST_RDX_OFFSET,
388+
CPU_CONTEXT_OFFSET_RDX,
389389
"cpu_regs rdx offset not match");
390390
ASSERT(offsetof(struct cpu_regs, rbp) ==
391-
VMX_MACHINE_T_GUEST_RBP_OFFSET,
391+
CPU_CONTEXT_OFFSET_RBP,
392392
"cpu_regs rbp offset not match");
393393
ASSERT(offsetof(struct cpu_regs, rsi) ==
394-
VMX_MACHINE_T_GUEST_RSI_OFFSET,
394+
CPU_CONTEXT_OFFSET_RSI,
395395
"cpu_regs rsi offset not match");
396396
ASSERT(offsetof(struct cpu_regs, rdi) ==
397-
VMX_MACHINE_T_GUEST_RDI_OFFSET,
397+
CPU_CONTEXT_OFFSET_RDI,
398398
"cpu_regs rdi offset not match");
399399
ASSERT(offsetof(struct cpu_regs, r8) ==
400-
VMX_MACHINE_T_GUEST_R8_OFFSET,
400+
CPU_CONTEXT_OFFSET_R8,
401401
"cpu_regs r8 offset not match");
402402
ASSERT(offsetof(struct cpu_regs, r9) ==
403-
VMX_MACHINE_T_GUEST_R9_OFFSET,
403+
CPU_CONTEXT_OFFSET_R9,
404404
"cpu_regs r9 offset not match");
405405
ASSERT(offsetof(struct cpu_regs, r10) ==
406-
VMX_MACHINE_T_GUEST_R10_OFFSET,
406+
CPU_CONTEXT_OFFSET_R10,
407407
"cpu_regs r10 offset not match");
408408
ASSERT(offsetof(struct cpu_regs, r11) ==
409-
VMX_MACHINE_T_GUEST_R11_OFFSET,
409+
CPU_CONTEXT_OFFSET_R11,
410410
"cpu_regs r11 offset not match");
411411
ASSERT(offsetof(struct cpu_regs, r12) ==
412-
VMX_MACHINE_T_GUEST_R12_OFFSET,
412+
CPU_CONTEXT_OFFSET_R12,
413413
"cpu_regs r12 offset not match");
414414
ASSERT(offsetof(struct cpu_regs, r13) ==
415-
VMX_MACHINE_T_GUEST_R13_OFFSET,
415+
CPU_CONTEXT_OFFSET_R13,
416416
"cpu_regs r13 offset not match");
417417
ASSERT(offsetof(struct cpu_regs, r14) ==
418-
VMX_MACHINE_T_GUEST_R14_OFFSET,
418+
CPU_CONTEXT_OFFSET_R14,
419419
"cpu_regs r14 offset not match");
420420
ASSERT(offsetof(struct cpu_regs, r15) ==
421-
VMX_MACHINE_T_GUEST_R15_OFFSET,
421+
CPU_CONTEXT_OFFSET_R15,
422422
"cpu_regs r15 offset not match");
423423
ASSERT(offsetof(struct run_context, cr2) ==
424-
VMX_MACHINE_T_GUEST_CR2_OFFSET,
424+
CPU_CONTEXT_OFFSET_CR2,
425425
"run_context cr2 offset not match");
426426
ASSERT(offsetof(struct run_context, ia32_spec_ctrl) ==
427-
VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET,
427+
CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL,
428428
"run_context ia32_spec_ctrl offset not match");
429429

430430
__bitmap_set(CPU_BOOT_ID, &pcpu_active_bitmap);

‎hypervisor/arch/x86/vmexit.c

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -240,22 +240,22 @@ int cr_access_vmexit_handler(struct vcpu *vcpu)
240240
struct run_context *cur_context =
241241
&vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context];
242242
static const int reg_trans_tab[] = {
243-
[0] = VMX_MACHINE_T_GUEST_RAX_INDEX,
244-
[1] = VMX_MACHINE_T_GUEST_RCX_INDEX,
245-
[2] = VMX_MACHINE_T_GUEST_RDX_INDEX,
246-
[3] = VMX_MACHINE_T_GUEST_RBX_INDEX,
243+
[0] = CPU_CONTEXT_INDEX_RAX,
244+
[1] = CPU_CONTEXT_INDEX_RCX,
245+
[2] = CPU_CONTEXT_INDEX_RDX,
246+
[3] = CPU_CONTEXT_INDEX_RBX,
247247
[4] = 0xFF, /* for sp reg, should not be used, just for init */
248-
[5] = VMX_MACHINE_T_GUEST_RBP_INDEX,
249-
[6] = VMX_MACHINE_T_GUEST_RSI_INDEX,
250-
[7] = VMX_MACHINE_T_GUEST_RDI_INDEX,
251-
[8] = VMX_MACHINE_T_GUEST_R8_INDEX,
252-
[9] = VMX_MACHINE_T_GUEST_R9_INDEX,
253-
[10] = VMX_MACHINE_T_GUEST_R10_INDEX,
254-
[11] = VMX_MACHINE_T_GUEST_R11_INDEX,
255-
[12] = VMX_MACHINE_T_GUEST_R12_INDEX,
256-
[13] = VMX_MACHINE_T_GUEST_R13_INDEX,
257-
[14] = VMX_MACHINE_T_GUEST_R14_INDEX,
258-
[15] = VMX_MACHINE_T_GUEST_R15_INDEX
248+
[5] = CPU_CONTEXT_INDEX_RBP,
249+
[6] = CPU_CONTEXT_INDEX_RSI,
250+
[7] = CPU_CONTEXT_INDEX_RDI,
251+
[8] = CPU_CONTEXT_INDEX_R8,
252+
[9] = CPU_CONTEXT_INDEX_R9,
253+
[10] = CPU_CONTEXT_INDEX_R10,
254+
[11] = CPU_CONTEXT_INDEX_R11,
255+
[12] = CPU_CONTEXT_INDEX_R12,
256+
[13] = CPU_CONTEXT_INDEX_R13,
257+
[14] = CPU_CONTEXT_INDEX_R14,
258+
[15] = CPU_CONTEXT_INDEX_R15,
259259
};
260260
int idx = VM_EXIT_CR_ACCESS_REG_IDX(vcpu->arch_vcpu.exit_qualification);
261261

‎hypervisor/arch/x86/vmx_asm.S

Lines changed: 37 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ vmx_vmrun:
5959

6060
/* 0x00000048 = MSR_IA32_SPEC_CTRL */
6161
movl $0x00000048,%ecx
62-
mov VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET(%rdi),%rax
62+
mov CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL(%rdi),%rax
6363
movl $0,%edx
6464
wrmsr
6565

@@ -80,25 +80,25 @@ next:
8080
/* Compare the launch flag to see if launching (1) or resuming (0) */
8181
cmp $VM_LAUNCH, %rsi
8282

83-
mov VMX_MACHINE_T_GUEST_CR2_OFFSET(%rdi),%rax
83+
mov CPU_CONTEXT_OFFSET_CR2(%rdi),%rax
8484
mov %rax,%cr2
8585

86-
mov VMX_MACHINE_T_GUEST_RAX_OFFSET(%rdi),%rax
87-
mov VMX_MACHINE_T_GUEST_RBX_OFFSET(%rdi),%rbx
88-
mov VMX_MACHINE_T_GUEST_RCX_OFFSET(%rdi),%rcx
89-
mov VMX_MACHINE_T_GUEST_RDX_OFFSET(%rdi),%rdx
90-
mov VMX_MACHINE_T_GUEST_RBP_OFFSET(%rdi),%rbp
91-
mov VMX_MACHINE_T_GUEST_RSI_OFFSET(%rdi),%rsi
92-
mov VMX_MACHINE_T_GUEST_R8_OFFSET(%rdi),%r8
93-
mov VMX_MACHINE_T_GUEST_R9_OFFSET(%rdi),%r9
94-
mov VMX_MACHINE_T_GUEST_R10_OFFSET(%rdi),%r10
95-
mov VMX_MACHINE_T_GUEST_R11_OFFSET(%rdi),%r11
96-
mov VMX_MACHINE_T_GUEST_R12_OFFSET(%rdi),%r12
97-
mov VMX_MACHINE_T_GUEST_R13_OFFSET(%rdi),%r13
98-
mov VMX_MACHINE_T_GUEST_R14_OFFSET(%rdi),%r14
99-
mov VMX_MACHINE_T_GUEST_R15_OFFSET(%rdi),%r15
100-
101-
mov VMX_MACHINE_T_GUEST_RDI_OFFSET(%rdi),%rdi
86+
mov CPU_CONTEXT_OFFSET_RAX(%rdi),%rax
87+
mov CPU_CONTEXT_OFFSET_RBX(%rdi),%rbx
88+
mov CPU_CONTEXT_OFFSET_RCX(%rdi),%rcx
89+
mov CPU_CONTEXT_OFFSET_RDX(%rdi),%rdx
90+
mov CPU_CONTEXT_OFFSET_RBP(%rdi),%rbp
91+
mov CPU_CONTEXT_OFFSET_RSI(%rdi),%rsi
92+
mov CPU_CONTEXT_OFFSET_R8(%rdi),%r8
93+
mov CPU_CONTEXT_OFFSET_R9(%rdi),%r9
94+
mov CPU_CONTEXT_OFFSET_R10(%rdi),%r10
95+
mov CPU_CONTEXT_OFFSET_R11(%rdi),%r11
96+
mov CPU_CONTEXT_OFFSET_R12(%rdi),%r12
97+
mov CPU_CONTEXT_OFFSET_R13(%rdi),%r13
98+
mov CPU_CONTEXT_OFFSET_R14(%rdi),%r14
99+
mov CPU_CONTEXT_OFFSET_R15(%rdi),%r15
100+
101+
mov CPU_CONTEXT_OFFSET_RDI(%rdi),%rdi
102102

103103
/* Execute appropriate VMX instruction */
104104
je vm_launch
@@ -122,30 +122,30 @@ vm_exit:
122122
xchg 0(%rsp),%rdi
123123

124124
/* Save current GPRs to guest state area */
125-
mov %rax,VMX_MACHINE_T_GUEST_RAX_OFFSET(%rdi)
125+
mov %rax,CPU_CONTEXT_OFFSET_RAX(%rdi)
126126

127127
mov %cr2,%rax
128-
mov %rax,VMX_MACHINE_T_GUEST_CR2_OFFSET(%rdi)
129-
130-
mov %rbx,VMX_MACHINE_T_GUEST_RBX_OFFSET(%rdi)
131-
mov %rcx,VMX_MACHINE_T_GUEST_RCX_OFFSET(%rdi)
132-
mov %rdx,VMX_MACHINE_T_GUEST_RDX_OFFSET(%rdi)
133-
mov %rbp,VMX_MACHINE_T_GUEST_RBP_OFFSET(%rdi)
134-
mov %rsi,VMX_MACHINE_T_GUEST_RSI_OFFSET(%rdi)
135-
mov %r8,VMX_MACHINE_T_GUEST_R8_OFFSET(%rdi)
136-
mov %r9,VMX_MACHINE_T_GUEST_R9_OFFSET(%rdi)
137-
mov %r10,VMX_MACHINE_T_GUEST_R10_OFFSET(%rdi)
138-
mov %r11,VMX_MACHINE_T_GUEST_R11_OFFSET(%rdi)
139-
mov %r12,VMX_MACHINE_T_GUEST_R12_OFFSET(%rdi)
140-
mov %r13,VMX_MACHINE_T_GUEST_R13_OFFSET(%rdi)
141-
mov %r14,VMX_MACHINE_T_GUEST_R14_OFFSET(%rdi)
142-
mov %r15,VMX_MACHINE_T_GUEST_R15_OFFSET(%rdi)
128+
mov %rax,CPU_CONTEXT_OFFSET_CR2(%rdi)
129+
130+
mov %rbx,CPU_CONTEXT_OFFSET_RBX(%rdi)
131+
mov %rcx,CPU_CONTEXT_OFFSET_RCX(%rdi)
132+
mov %rdx,CPU_CONTEXT_OFFSET_RDX(%rdi)
133+
mov %rbp,CPU_CONTEXT_OFFSET_RBP(%rdi)
134+
mov %rsi,CPU_CONTEXT_OFFSET_RSI(%rdi)
135+
mov %r8,CPU_CONTEXT_OFFSET_R8(%rdi)
136+
mov %r9,CPU_CONTEXT_OFFSET_R9(%rdi)
137+
mov %r10,CPU_CONTEXT_OFFSET_R10(%rdi)
138+
mov %r11,CPU_CONTEXT_OFFSET_R11(%rdi)
139+
mov %r12,CPU_CONTEXT_OFFSET_R12(%rdi)
140+
mov %r13,CPU_CONTEXT_OFFSET_R13(%rdi)
141+
mov %r14,CPU_CONTEXT_OFFSET_R14(%rdi)
142+
mov %r15,CPU_CONTEXT_OFFSET_R15(%rdi)
143143

144144
/* Load guest RDI off host stack and into RDX */
145145
mov 0(%rsp),%rdx
146146

147147
/* Save guest RDI to guest state area */
148-
mov %rdx,VMX_MACHINE_T_GUEST_RDI_OFFSET(%rdi)
148+
mov %rdx,CPU_CONTEXT_OFFSET_RDI(%rdi)
149149

150150
/* Save RDI to RSI for later SPEC_CTRL save*/
151151
mov %rdi,%rsi
@@ -192,7 +192,7 @@ vm_eval_error:
192192
*/
193193
movl $0x00000048,%ecx
194194
rdmsr
195-
mov %rax,VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET(%rsi)
195+
mov %rax,CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL(%rsi)
196196
/* 0x1 = SPEC_ENABLE_IBRS */
197197
movl $0x1,%eax
198198
movl $0,%edx
@@ -215,7 +215,7 @@ ibrs_opt:
215215
*/
216216
movl $0x00000048,%ecx
217217
rdmsr
218-
mov %rax,VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET(%rsi)
218+
mov %rax,CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL(%rsi)
219219
/* 0x2 = SPEC_ENABLE_STIBP */
220220
movl $0x2,%eax
221221
movl $0,%edx

‎hypervisor/include/arch/x86/guest/vcpu.h

Lines changed: 55 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -16,45 +16,61 @@
1616
#define NUM_GPRS 15
1717
#define GUEST_STATE_AREA_SIZE 512
1818

19-
/* Indexes of GPRs saved / restored for guest */
20-
#define VMX_MACHINE_T_GUEST_RAX_INDEX 0
21-
#define VMX_MACHINE_T_GUEST_RBX_INDEX 1
22-
#define VMX_MACHINE_T_GUEST_RCX_INDEX 2
23-
#define VMX_MACHINE_T_GUEST_RDX_INDEX 3
24-
#define VMX_MACHINE_T_GUEST_RBP_INDEX 4
25-
#define VMX_MACHINE_T_GUEST_RSI_INDEX 5
26-
#define VMX_MACHINE_T_GUEST_R8_INDEX 6
27-
#define VMX_MACHINE_T_GUEST_R9_INDEX 7
28-
#define VMX_MACHINE_T_GUEST_R10_INDEX 8
29-
#define VMX_MACHINE_T_GUEST_R11_INDEX 9
30-
#define VMX_MACHINE_T_GUEST_R12_INDEX 10
31-
#define VMX_MACHINE_T_GUEST_R13_INDEX 11
32-
#define VMX_MACHINE_T_GUEST_R14_INDEX 12
33-
#define VMX_MACHINE_T_GUEST_R15_INDEX 13
34-
#define VMX_MACHINE_T_GUEST_RDI_INDEX 14
35-
36-
/* Offsets of GPRs for guest within the VCPU data structure */
37-
#define VMX_MACHINE_T_GUEST_RAX_OFFSET (VMX_MACHINE_T_GUEST_RAX_INDEX*REG_SIZE)
38-
#define VMX_MACHINE_T_GUEST_RBX_OFFSET (VMX_MACHINE_T_GUEST_RBX_INDEX*REG_SIZE)
39-
#define VMX_MACHINE_T_GUEST_RCX_OFFSET (VMX_MACHINE_T_GUEST_RCX_INDEX*REG_SIZE)
40-
#define VMX_MACHINE_T_GUEST_RDX_OFFSET (VMX_MACHINE_T_GUEST_RDX_INDEX*REG_SIZE)
41-
#define VMX_MACHINE_T_GUEST_RBP_OFFSET (VMX_MACHINE_T_GUEST_RBP_INDEX*REG_SIZE)
42-
#define VMX_MACHINE_T_GUEST_RSI_OFFSET (VMX_MACHINE_T_GUEST_RSI_INDEX*REG_SIZE)
43-
#define VMX_MACHINE_T_GUEST_RDI_OFFSET (VMX_MACHINE_T_GUEST_RDI_INDEX*REG_SIZE)
44-
#define VMX_MACHINE_T_GUEST_R8_OFFSET (VMX_MACHINE_T_GUEST_R8_INDEX*REG_SIZE)
45-
#define VMX_MACHINE_T_GUEST_R9_OFFSET (VMX_MACHINE_T_GUEST_R9_INDEX*REG_SIZE)
46-
#define VMX_MACHINE_T_GUEST_R10_OFFSET (VMX_MACHINE_T_GUEST_R10_INDEX*REG_SIZE)
47-
#define VMX_MACHINE_T_GUEST_R11_OFFSET (VMX_MACHINE_T_GUEST_R11_INDEX*REG_SIZE)
48-
#define VMX_MACHINE_T_GUEST_R12_OFFSET (VMX_MACHINE_T_GUEST_R12_INDEX*REG_SIZE)
49-
#define VMX_MACHINE_T_GUEST_R13_OFFSET (VMX_MACHINE_T_GUEST_R13_INDEX*REG_SIZE)
50-
#define VMX_MACHINE_T_GUEST_R14_OFFSET (VMX_MACHINE_T_GUEST_R14_INDEX*REG_SIZE)
51-
#define VMX_MACHINE_T_GUEST_R15_OFFSET (VMX_MACHINE_T_GUEST_R15_INDEX*REG_SIZE)
52-
53-
/* Hard-coded offset of cr2 in struct run_context!! */
54-
#define VMX_MACHINE_T_GUEST_CR2_OFFSET (128)
55-
56-
/* Hard-coded offset of cr2 in struct run_context!! */
57-
#define VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET (192)
19+
#define CPU_CONTEXT_INDEX_RAX 0
20+
#define CPU_CONTEXT_INDEX_RBX 1
21+
#define CPU_CONTEXT_INDEX_RCX 2
22+
#define CPU_CONTEXT_INDEX_RDX 3
23+
#define CPU_CONTEXT_INDEX_RBP 4
24+
#define CPU_CONTEXT_INDEX_RSI 5
25+
#define CPU_CONTEXT_INDEX_R8 6
26+
#define CPU_CONTEXT_INDEX_R9 7
27+
#define CPU_CONTEXT_INDEX_R10 8
28+
#define CPU_CONTEXT_INDEX_R11 9
29+
#define CPU_CONTEXT_INDEX_R12 10
30+
#define CPU_CONTEXT_INDEX_R13 11
31+
#define CPU_CONTEXT_INDEX_R14 12
32+
#define CPU_CONTEXT_INDEX_R15 13
33+
#define CPU_CONTEXT_INDEX_RDI 14
34+
35+
#define CPU_CONTEXT_OFFSET_RAX 0
36+
#define CPU_CONTEXT_OFFSET_RBX 8
37+
#define CPU_CONTEXT_OFFSET_RCX 16
38+
#define CPU_CONTEXT_OFFSET_RDX 24
39+
#define CPU_CONTEXT_OFFSET_RBP 32
40+
#define CPU_CONTEXT_OFFSET_RSI 40
41+
#define CPU_CONTEXT_OFFSET_R8 48
42+
#define CPU_CONTEXT_OFFSET_R9 56
43+
#define CPU_CONTEXT_OFFSET_R10 64
44+
#define CPU_CONTEXT_OFFSET_R11 72
45+
#define CPU_CONTEXT_OFFSET_R12 80
46+
#define CPU_CONTEXT_OFFSET_R13 88
47+
#define CPU_CONTEXT_OFFSET_R14 96
48+
#define CPU_CONTEXT_OFFSET_R15 104
49+
#define CPU_CONTEXT_OFFSET_RDI 112
50+
#define CPU_CONTEXT_OFFSET_CR0 120
51+
#define CPU_CONTEXT_OFFSET_CR2 128
52+
#define CPU_CONTEXT_OFFSET_CR3 136
53+
#define CPU_CONTEXT_OFFSET_CR4 144
54+
#define CPU_CONTEXT_OFFSET_RIP 152
55+
#define CPU_CONTEXT_OFFSET_RSP 160
56+
#define CPU_CONTEXT_OFFSET_RFLAGS 168
57+
#define CPU_CONTEXT_OFFSET_TSC_OFFSET 184
58+
#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 192
59+
#define CPU_CONTEXT_OFFSET_IA32_STAR 200
60+
#define CPU_CONTEXT_OFFSET_IA32_LSTAR 208
61+
#define CPU_CONTEXT_OFFSET_IA32_FMASK 216
62+
#define CPU_CONTEXT_OFFSET_IA32_KERNEL_GS_BASE 224
63+
#define CPU_CONTEXT_OFFSET_CS 280
64+
#define CPU_CONTEXT_OFFSET_SS 312
65+
#define CPU_CONTEXT_OFFSET_DS 344
66+
#define CPU_CONTEXT_OFFSET_ES 376
67+
#define CPU_CONTEXT_OFFSET_FS 408
68+
#define CPU_CONTEXT_OFFSET_GS 440
69+
#define CPU_CONTEXT_OFFSET_TR 472
70+
#define CPU_CONTEXT_OFFSET_IDTR 504
71+
#define CPU_CONTEXT_OFFSET_LDTR 536
72+
#define CPU_CONTEXT_OFFSET_GDTR 568
73+
#define CPU_CONTEXT_OFFSET_FXSTORE_GUEST_AREA 608
5874

5975
/*sizes of various registers within the VCPU data structure */
6076
#define VMX_CPU_S_FXSAVE_GUEST_AREA_SIZE GUEST_STATE_AREA_SIZE

0 commit comments

Comments
 (0)