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YangLiang3lijinxia
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DM USB: xHCI: Set correct PCI VID/PID for APL DRD cap.
For dedicated xHCI extended capability, it need set corresponding PCI VID/PID. This patch sets the Intel Apollo Lake platform PCI VID/PID for DRD capability which will be checked for enabling DRD fucntion in new DRD driver. Besides, this patch refines the PCI VID/PID related code. Signed-off-by: Liang Yang <liang3.yang@intel.com> Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com> Reviewed-by: Yu Wang <yu1.wang@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
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-2
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devicemodel/hw/pci/xhci.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -366,6 +366,8 @@ struct pci_xhci_vdev {
366366
struct pci_xhci_dev_emu **devices; /* XHCI[port] = device */
367367
struct pci_xhci_dev_emu **slots; /* slots assigned from 1 */
368368
int ndevices;
369+
uint16_t pid;
370+
uint16_t vid;
369371

370372
void *excap_ptr;
371373
int (*excap_write)(struct pci_xhci_vdev *, uint64_t, uint64_t);
@@ -3447,6 +3449,8 @@ pci_xhci_parse_extcap(struct pci_xhci_vdev *xdev, char *opts)
34473449
if (!strncmp(cap, "apl", 3)) {
34483450
xdev->excap_write = pci_xhci_apl_drdregs_write;
34493451
xdev->excap_ptr = excap_group_apl;
3452+
xdev->vid = XHCI_PCI_VENDOR_ID_INTEL;
3453+
xdev->pid = XHCI_PCI_DEVICE_ID_INTEL_APL;
34503454
} else
34513455
rc = -2;
34523456

@@ -3575,6 +3579,9 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
35753579

35763580
xdev->excap_ptr = excap_group_dft;
35773581

3582+
xdev->vid = XHCI_PCI_DEVICE_ID_DFLT;
3583+
xdev->pid = XHCI_PCI_VENDOR_ID_DFLT;
3584+
35783585
/* discover devices */
35793586
error = pci_xhci_parse_opts(xdev, opts);
35803587
if (error < 0)
@@ -3639,8 +3646,8 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
36393646
*/
36403647
xdev->hccparams1 |= XHCI_SET_HCCP1_XECP(XHCI_EXCAP_PTR);
36413648

3642-
pci_set_cfgdata16(dev, PCIR_DEVICE, 0x1E31);
3643-
pci_set_cfgdata16(dev, PCIR_VENDOR, 0x8086);
3649+
pci_set_cfgdata16(dev, PCIR_DEVICE, xdev->pid);
3650+
pci_set_cfgdata16(dev, PCIR_VENDOR, xdev->vid);
36443651
pci_set_cfgdata8(dev, PCIR_CLASS, PCIC_SERIALBUS);
36453652
pci_set_cfgdata8(dev, PCIR_SUBCLASS, PCIS_SERIALBUS_USB);
36463653
pci_set_cfgdata8(dev, PCIR_PROGIF, PCIP_SERIALBUS_USB_XHCI);

devicemodel/include/xhcireg.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -240,6 +240,16 @@
240240
#define EXCAP_GROUP_END 0xFFFF
241241
#define EXCAP_GROUP_NULL NULL
242242

243+
/* xHCI PCI Vendor IDs */
244+
#define XHCI_PCI_VENDOR_ID_INTEL 0x8086
245+
246+
/* xHCI PCI Device IDs */
247+
#define XHCI_PCI_DEVICE_ID_INTEL_APL 0x5aa8
248+
249+
/* Default xHCI PCI VID/PID */
250+
#define XHCI_PCI_VENDOR_ID_DFLT XHCI_PCI_VENDOR_ID_INTEL
251+
#define XHCI_PCI_DEVICE_ID_DFLT 0x1e31
252+
243253
/* Intel APL xHCI DRD Configuration registers */
244254
#define XHCI_DRD_MUX_CFG0 0x0000
245255
#define XHCI_DRD_MUX_CFG1 0x0004

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