HV:treewide:Update return type for function fls64 and clz64

Change the return type of function fls64 and clz64 as uint16_t;
When the input is zero, INVALID_ID_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls64 or clz64;
When input value is zero, clz64 returns 64 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Partly revert apicv_pending_intr udpates;
        Add type conversion as needed;
        Coding style fixing.
V2-->V3:
        Correct type conversion;
        fls64 return INVALID_BIT_INDEX directly when
        the input value is zero.
V3-->V4:
        No updates for this part in PATCH V4.

Note: For instruction "bsrq", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

Author: wuxyintel

hypervisor/arch/x86/guest/vlapic.c

@@ -2104,7 +2104,7 @@ apicv_pending_intr(struct vlapic *vlapic, __unused uint32_t *vecptr)
 	for (i = 3; i >= 0; i--) {
 		pirval = pir_desc->pir[i];
 		if (pirval != 0) {
-			vpr = (i * 64 + fls64(pirval)) & 0xF0U;
+			vpr = (((uint32_t)(i * 64) + (uint32_t)fls64(pirval)) & 0xF0U);
 			return (vpr > ppr);
 		}
 	}
@@ -2188,7 +2188,7 @@ apicv_inject_pir(struct vlapic *vlapic)
 	struct pir_desc *pir_desc;
 	struct lapic_regs *lapic;
 	uint64_t val, pirval;
-	int rvi, pirbase = -1, i;
+	uint16_t rvi, pirbase = 0U, i;
 	uint16_t intr_status_old, intr_status_new;
 	struct lapic_reg *irr = NULL;
 
@@ -2197,17 +2197,16 @@ apicv_inject_pir(struct vlapic *vlapic)
 		return;
 
 	pirval = 0;
-	pirbase = -1;
 	lapic = vlapic->apic_page;
 	irr = &lapic->irr[0];
 
-	for (i = 0; i < 4; i++) {
+	for (i = 0U; i < 4U; i++) {
 		val = atomic_readandclear64((long *)&pir_desc->pir[i]);
 		if (val != 0) {
-			irr[i * 2].val |= val;
-			irr[(i * 2) + 1].val |= val >> 32;
+			irr[i * 2U].val |= val;
+			irr[(i * 2U) + 1U].val |= val >> 32;
 
-			pirbase = 64*i;
+			pirbase = 64U*i;
 			pirval = val;
 		}
 	}

hypervisor/include/lib/bits.h

@@ -74,14 +74,15 @@ static inline uint16_t fls(uint32_t value)
 	return (uint16_t)ret;
 }
 
-static inline int fls64(unsigned long value)
+static inline uint16_t fls64(uint64_t value)
 {
-	int ret;
-
-	asm volatile("bsrq %1,%q0"
+	uint64_t ret = 0UL;
+	if (value == 0UL)
+		return (INVALID_BIT_INDEX);
+	asm volatile("bsrq %1,%0"
 			: "=r" (ret)
-			: "rm" (value), "0" (-1));
-	return ret;
+			: "rm" (value));
+	return (uint16_t)ret;
 }
 
 /**
@@ -152,9 +153,13 @@ static inline uint16_t clz(uint32_t value)
  *
  * @return The number of leading zeros in 'value'.
  */
-static inline int clz64(unsigned long value)
+static inline uint16_t clz64(uint64_t value)
 {
-	return (63 - fls64(value));
+	if (value == 0UL)
+		return 64U;
+	else{
+		return (63U - fls64(value));
+	}
 }
 
 /*

hypervisor/lib/div.c

@@ -94,7 +94,7 @@ int udiv64(uint64_t dividend, uint64_t divisor, struct udiv_result *res)
 	 */
 
 	/* align divisor and dividend. */
-	bits = clz64(divisor) - clz64(dividend);
+	bits = (uint64_t)(clz64(divisor) - clz64(dividend));
 	divisor <<= bits;
 	mask = 1UL << bits;
 	/* division loop */